Symbol: WR5_DTR
sys/arch/luna88k/dev/siotty.c
420
val |= WR5_DTR;
sys/arch/luna88k/dev/siotty.c
427
wr5 &= ~(WR5_BREAK|WR5_DTR|WR5_RTS);
sys/arch/luna88k/dev/siotty.c
438
if (wr5 & WR5_DTR)
sys/arch/luna88k/dev/siotty.c
59
WR5_TX8BIT | WR5_TXENBL | WR5_DTR | WR5_RTS, /* Tx */
sys/arch/luna88k/stand/boot/sio.c
212
sioreg(REG(0, WR5), WR5_TX8BIT | WR5_TXENBL | WR5_DTR | WR5_RTS); /* Tx */