Symbol: WR2_INTR_1
sys/arch/luna88k/dev/siotty.c
148
setsioreg(sc->sc_ctl, WR2A, WR2_VEC86 | WR2_INTR_1);
sys/arch/luna88k/dev/siotty.c
666
setsioreg(sio, WR2A, WR2_VEC86 | WR2_INTR_1);
sys/arch/luna88k/stand/boot/sio.c
206
sioreg(WR2A, WR2_VEC86 | WR2_INTR_1); /* Set CPU BUS Interface Mode */