sys/dev/pci/if_wb.c

1346

CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_CONFIG);

sys/dev/pci/if_wb.c

1351

CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_MUSTBEONE|WB_BUSCTL_ARBITRATION);

sys/dev/pci/if_wb.c

1352

WB_SETBIT(sc, WB_BUSCTL, WB_BURSTLEN_16LONG);

sys/dev/pci/if_wb.c

1355

WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_32LONG);

sys/dev/pci/if_wb.c

1358

WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_16LONG);

sys/dev/pci/if_wb.c

1361

WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_8LONG);

sys/dev/pci/if_wb.c

1365

WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_NONE);

sys/dev/pci/if_wb.c

598

CSR_WRITE_4(sc, WB_BUSCTL, 0);

sys/dev/pci/if_wb.c

602

WB_SETBIT(sc, WB_BUSCTL, WB_BUSCTL_RESET);

sys/dev/pci/if_wb.c

603

WB_SETBIT(sc, WB_BUSCTL, WB_BUSCTL_RESET);

sys/dev/pci/if_wb.c

607

if (!(CSR_READ_4(sc, WB_BUSCTL) & WB_BUSCTL_RESET))