sys/dev/pci/drm/i915/display/intel_hdmi.c

225

val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */

sys/dev/pci/drm/i915/display/intel_hdmi.c

258

VIDEO_DIP_SELECT_MASK | 0xf, g4x_infoframe_index(type));

sys/dev/pci/drm/i915/display/intel_hdmi.c

295

val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */

sys/dev/pci/drm/i915/display/intel_hdmi.c

330

VIDEO_DIP_SELECT_MASK | 0xf, g4x_infoframe_index(type));

sys/dev/pci/drm/i915/display/intel_hdmi.c

370

val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */

sys/dev/pci/drm/i915/display/intel_hdmi.c

408

VIDEO_DIP_SELECT_MASK | 0xf, g4x_infoframe_index(type));

sys/dev/pci/drm/i915/display/intel_hdmi.c

444

val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */

sys/dev/pci/drm/i915/display/intel_hdmi.c

480

VIDEO_DIP_SELECT_MASK | 0xf, g4x_infoframe_index(type));