BLC_PWM_PCH_CTL1
pch_ctl1 = intel_de_read(display, BLC_PWM_PCH_CTL1);
intel_de_write(display, BLC_PWM_PCH_CTL1,
pch_ctl1 = intel_de_read(display, BLC_PWM_PCH_CTL1);
intel_de_rmw(display, BLC_PWM_PCH_CTL1, BLM_PCH_PWM_ENABLE, 0);
intel_de_rmw(display, BLC_PWM_PCH_CTL1, BLM_PCH_PWM_ENABLE, 0);
pch_ctl1 = intel_de_read(display, BLC_PWM_PCH_CTL1);
intel_de_write(display, BLC_PWM_PCH_CTL1, pch_ctl1);
intel_de_write(display, BLC_PWM_PCH_CTL1, pch_ctl1);
intel_de_posting_read(display, BLC_PWM_PCH_CTL1);
intel_de_write(display, BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
pch_ctl1 = intel_de_read(display, BLC_PWM_PCH_CTL1);
intel_de_write(display, BLC_PWM_PCH_CTL1, pch_ctl1);
intel_de_write(display, BLC_PWM_PCH_CTL1, pch_ctl1);
intel_de_posting_read(display, BLC_PWM_PCH_CTL1);
intel_de_write(display, BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
intel_de_read(display, BLC_PWM_PCH_CTL1) & BLM_PCH_PWM_ENABLE,
MMIO_D(BLC_PWM_PCH_CTL1);