BL0
#define OSIOP_DMODE (0x38+BL0) /* rw: DMA Mode reg */
#define OSIOP_SCNTL0 (0x00+BL0) /* rw: SCSI control reg 0 */
#define OSIOP_SCID (0x04+BL0) /* rw: SCSI Chip ID reg */
#define OSIOP_SFBR (0x08+BL0) /* ro: SCSI First Byte Received */
#define OSIOP_DSTAT (0x0c+BL0) /* ro: DMA status */
#define OSIOP_CTEST0 (0x14+BL0) /* ro: Chip test register 0 */
#define OSIOP_CTEST4 (0x18+BL0) /* rw: Chip test register 4 */
#define OSIOP_DFIFO (0x20+BL0) /* rw: DMA FIFO */
#define OSIOP_DBC0 (0x24+BL0) /* rw: DMA Byte Counter reg 0 */