sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

1039

if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) &&

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras_eeprom.c

652

if ((record[i].mem_channel < BITS_PER_TYPE(control->bad_channel_bitmap)) &&

sys/dev/pci/drm/display/drm_dp_tunnel.c

1651

for_each_set_bit(id, &move_mask, BITS_PER_TYPE(move_mask))

sys/dev/pci/drm/display/drm_dp_tunnel.c

1711

stream_id > BITS_PER_TYPE(tunnel_state->stream_mask)))

sys/dev/pci/drm/drm_drv.c

656

for_each_set_bit(opt, &method, BITS_PER_TYPE(method)) {

sys/dev/pci/drm/drm_edid.c

6094

int i, len = min_t(int, info->vics_len, BITS_PER_TYPE(y420cmdb_map));

sys/dev/pci/drm/drm_print.c

324

if (WARN_ON_ONCE(nbits > BITS_PER_TYPE(value)))

sys/dev/pci/drm/drm_print.c

325

nbits = BITS_PER_TYPE(value);

sys/dev/pci/drm/i915/display/intel_display_device.c

1777

BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->pipe_mask) < I915_MAX_PIPES);

sys/dev/pci/drm/i915/display/intel_display_device.c

1778

BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->cpu_transcoder_mask) < I915_MAX_TRANSCODERS);

sys/dev/pci/drm/i915/display/intel_display_device.c

1779

BUILD_BUG_ON(BITS_PER_TYPE(display_runtime->port_mask) < I915_MAX_PORTS);

sys/dev/pci/drm/i915/display/intel_display_power.c

1179

for_each_set_bit(i, &abox_regs, BITS_PER_TYPE(abox_regs))

sys/dev/pci/drm/i915/display/intel_display_power.c

1644

for_each_set_bit(i, &abox_mask, BITS_PER_TYPE(abox_mask))

sys/dev/pci/drm/i915/display/intel_display_power.c

1648

for_each_set_bit(i, &abox_mask, BITS_PER_TYPE(abox_mask)) {

sys/dev/pci/drm/i915/display/intel_display_types.h

1741

#define INTEL_DP_LINK_RATE_IDX_BITS (BITS_PER_TYPE(u8) - INTEL_DP_LANE_COUNT_EXP_BITS)

sys/dev/pci/drm/i915/display/intel_frontbuffer.c

343

BITS_PER_TYPE(atomic_t));

sys/dev/pci/drm/i915/display/intel_hotplug_irq.c

1120

BUILD_BUG_ON(BITS_PER_TYPE(available_pins) < HPD_NUM_PINS);

sys/dev/pci/drm/i915/display/intel_hotplug_irq.c

352

BUILD_BUG_ON(BITS_PER_TYPE(*pin_mask) < HPD_NUM_PINS);

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1333

BITS_PER_TYPE(frame->ring.size) - ilog2(frame->ring.size);

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

478

BUILD_BUG_ON(BITS_PER_TYPE(engine->mask) < I915_NUM_ENGINES);

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

968

GENMASK(BITS_PER_TYPE(mask) - 1, I915_NUM_ENGINES));

sys/dev/pci/drm/i915/gt/intel_engine_types.h

61

#define VIRTUAL_ENGINES BIT(BITS_PER_TYPE(intel_engine_mask_t) - 1)

sys/dev/pci/drm/i915/gt/intel_ring.c

161

ring->wrap = BITS_PER_TYPE(ring->size) - ilog2(size);

sys/dev/pci/drm/i915/gt/intel_sseu.h

66

#define XEHP_BITMAP_BITS(mask) ((int)BITS_PER_TYPE(typeof(mask.xehp)))

sys/dev/pci/drm/i915/gt/selftest_tlb.c

317

BITS_PER_TYPE(RUNTIME_INFO(gt->i915)->page_sizes)) {

sys/dev/pci/drm/i915/i915_drv.h

460

BITS_PER_TYPE(info->platform_mask[0]) - INTEL_SUBPLATFORM_BITS;

sys/dev/pci/drm/i915/i915_drv.h

474

BITS_PER_TYPE(info->platform_mask[0]) - INTEL_SUBPLATFORM_BITS;

sys/dev/pci/drm/i915/i915_drv.h

508

const unsigned int msb = BITS_PER_TYPE(info->platform_mask[0]) - 1;

sys/dev/pci/drm/i915/i915_mitigations.c

39

BUILD_BUG_ON(ARRAY_SIZE(names) >= BITS_PER_TYPE(mitigations));

sys/dev/pci/drm/i915/i915_pmu.c

117

BITS_PER_TYPE(typeof_member(struct i915_pmu,

sys/dev/pci/drm/i915/i915_pmu.c

121

BITS_PER_TYPE(typeof_member(struct i915_pmu,

sys/dev/pci/drm/i915/i915_sw_fence.c

26

BITS_PER_TYPE(typeof_member(struct wait_queue_entry, flags))

sys/dev/pci/drm/i915/i915_syncmap.c

92

BUILD_BUG_ON(KSYNCMAP > BITS_PER_TYPE((*root)->bitmap));

sys/dev/pci/drm/i915/intel_device_info.c

400

BUILD_BUG_ON(BITS_PER_TYPE(intel_engine_mask_t) < I915_NUM_ENGINES);

sys/dev/pci/drm/i915/intel_runtime_pm.h

82

BITS_PER_TYPE(typeof_member(struct intel_runtime_pm, wakeref_count))

sys/dev/pci/drm/include/linux/overflow.h

92

(sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))