sys/arch/macppc/dev/adb.c

1006

write_via_reg(VIA1, vIER, 0x04);/* turn interrupts off - TO

sys/arch/macppc/dev/adb.c

139

#define ADB_SET_STATE_IDLE_CUDA() via_reg_or(VIA1, vBufB, (vPB4 | vPB5))

sys/arch/macppc/dev/adb.c

140

#define ADB_SET_STATE_TIP() via_reg_and(VIA1, vBufB, ~vPB5)

sys/arch/macppc/dev/adb.c

141

#define ADB_CLR_STATE_TIP() via_reg_or(VIA1, vBufB, vPB5)

sys/arch/macppc/dev/adb.c

142

#define ADB_TOGGLE_STATE_ACK_CUDA() via_reg_xor(VIA1, vBufB, vPB4)

sys/arch/macppc/dev/adb.c

143

#define ADB_SET_STATE_ACKOFF_CUDA() via_reg_or(VIA1, vBufB, vPB4)

sys/arch/macppc/dev/adb.c

144

#define ADB_SET_SR_INPUT() via_reg_and(VIA1, vACR, ~vSR_OUT)

sys/arch/macppc/dev/adb.c

145

#define ADB_SET_SR_OUTPUT() via_reg_or(VIA1, vACR, vSR_OUT)

sys/arch/macppc/dev/adb.c

146

#define ADB_SR() read_via_reg(VIA1, vSR)

sys/arch/macppc/dev/adb.c

147

#define ADB_VIA_INTR_ENABLE() write_via_reg(VIA1, vIER, 0x84)

sys/arch/macppc/dev/adb.c

148

#define ADB_VIA_INTR_DISABLE() write_via_reg(VIA1, vIER, 0x04)

sys/arch/macppc/dev/adb.c

149

#define ADB_VIA_CLR_INTR() write_via_reg(VIA1, vIFR, 0x04)

sys/arch/macppc/dev/adb.c

150

#define ADB_INTR_IS_OFF (vPB3 == (read_via_reg(VIA1, vBufB) & vPB3))

sys/arch/macppc/dev/adb.c

151

#define ADB_INTR_IS_ON (0 == (read_via_reg(VIA1, vBufB) & vPB3))

sys/arch/macppc/dev/adb.c

152

#define ADB_SR_INTR_IS_ON (vSR_INT == (read_via_reg(VIA1, \

sys/arch/macppc/dev/adb.c

450

write_via_reg(VIA1, vSR, adbOutputBuffer[adbSentChars + 1]);

sys/arch/macppc/dev/adb.c

519

write_via_reg(VIA1, vSR, adbOutputBuffer[adbSentChars + 1]); /* send next byte */

sys/arch/macppc/dev/adb.c

614

write_via_reg(VIA1, vSR, adbOutputBuffer[adbSentChars + 1]); /* load byte for output */

sys/arch/macppc/dev/adb.c

972

write_via_reg(VIA1, vIFR, 0x90); /* clear interrupt */

sys/arch/macppc/dev/adb.c

976

via_reg_or(VIA1, vDirB, 0x30); /* register B bits 4 and 5:

sys/arch/macppc/dev/adb.c

978

via_reg_and(VIA1, vDirB, 0xf7); /* register B bit 3: input */

sys/arch/macppc/dev/adb.c

979

via_reg_and(VIA1, vACR, ~vSR_OUT); /* make sure SR is set

sys/arch/macppc/dev/adb.c

981

write_via_reg(VIA1, vACR, (read_via_reg(VIA1, vACR) | 0x0c) & ~0x10);

sys/arch/macppc/dev/adb.c

984

write_via_reg(VIA1, vIER, 0x84);/* make sure VIA interrupts

sys/arch/macppc/dev/pm_direct.c

265

via_reg_or(VIA1, vACR, 0x0c);

sys/arch/macppc/dev/pm_direct.c

266

via_reg_and(VIA1, vACR, ~0x10);

sys/arch/macppc/dev/pm_direct.c

285

via_reg_or(VIA1, vACR, 0x1c);

sys/arch/macppc/dev/pm_direct.c

298

via_reg_or(VIA1, vACR, 0x1c);

sys/arch/macppc/dev/pm_direct.c

299

write_via_reg(VIA1, vSR, data); /* PM_SR() = data; */

sys/arch/macppc/dev/pm_direct.c

305

via_reg_or(VIA1, vACR, 0x1c);

sys/arch/macppc/dev/pm_direct.c

315

via_reg_or(VIA1, vACR, 0x1c);

sys/arch/macppc/dev/pm_direct.c

342

via1_vIER &= read_via_reg(VIA1, vIER);

sys/arch/macppc/dev/pm_direct.c

343

write_via_reg(VIA1, vIER, via1_vIER);

sys/arch/macppc/dev/pm_direct.c

414

write_via_reg(VIA1, vIER, via1_vIER);

sys/arch/macppc/dev/pm_direct.c

519

write_via_reg(VIA1, vIER, 0x10);

sys/arch/macppc/dev/pm_direct.c

58

#define PM_SR() read_via_reg(VIA1, vSR)

sys/arch/macppc/dev/pm_direct.c

59

#define PM_VIA_INTR_ENABLE() write_via_reg(VIA1, vIER, 0x90)

sys/arch/macppc/dev/pm_direct.c

60

#define PM_VIA_INTR_DISABLE() write_via_reg(VIA1, vIER, 0x10)

sys/arch/macppc/dev/pm_direct.c

605

ifr = read_via_reg(VIA1, vIFR);

sys/arch/macppc/dev/pm_direct.c

61

#define PM_VIA_CLR_INTR() write_via_reg(VIA1, vIFR, 0x90)