V4L2_HEVC_DPB_ENTRIES_NUM_MAX
int8_t delta_luma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
int8_t luma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
int8_t delta_chroma_weight_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
int8_t chroma_offset_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
int8_t delta_luma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
int8_t luma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
int8_t delta_chroma_weight_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
int8_t chroma_offset_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX][2];
u_int8_t ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
u_int8_t ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
u_int8_t poc_st_curr_before[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
u_int8_t poc_st_curr_after[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
u_int8_t poc_lt_curr[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
struct v4l2_hevc_dpb_entry dpb[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];