sys/dev/pci/drm/i915/gt/intel_engine_cs.c

143

[VCS1] = {

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1710

[VCS1] = MSG_IDLE_VCS1,

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

413

[VCS1] = GEN11_GRDOM_MEDIA2,

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

438

[VCS1] = GEN8_GRDOM_MEDIA2,

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

3505

[VCS1] = GEN8_VCS1_IRQ_SHIFT,

sys/dev/pci/drm/i915/gt/intel_mocs.c

571

[VCS1] = __GEN9_VCS1_MOCS0,

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1170

[VCS1] = {

sys/dev/pci/drm/i915/gvt/cmd_parser.c

430

#define R_VCS2 BIT(VCS1)

sys/dev/pci/drm/i915/gvt/cmd_parser.c

644

[VCS1] = {

sys/dev/pci/drm/i915/gvt/execlist.c

52

[VCS1] = VCS2_AS_CONTEXT_SWITCH,

sys/dev/pci/drm/i915/gvt/handlers.c

2110

id = VCS1;

sys/dev/pci/drm/i915/gvt/handlers.c

2186

if (HAS_ENGINE(gvt->gt, VCS1)) \

sys/dev/pci/drm/i915/gvt/handlers.c

356

engine_mask |= BIT(VCS1);

sys/dev/pci/drm/i915/gvt/interrupt.c

598

if (HAS_ENGINE(gvt->gt, VCS1)) {

sys/dev/pci/drm/i915/gvt/mmio_context.c

143

{VCS1, RING_EXCC(GEN8_BSD2_RING_BASE), 0xffff, false}, /* 0x1c028 */

sys/dev/pci/drm/i915/gvt/mmio_context.c

171

[VCS1] = 0xca00,

sys/dev/pci/drm/i915/gvt/mmio_context.c

358

[VCS1] = 0x4268,

sys/dev/pci/drm/i915/gvt/mmio_context.c

415

[VCS1] = 0xca00,

sys/dev/pci/drm/i915/i915_pci.c

447

BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),

sys/dev/pci/drm/i915/i915_pci.c

498

BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)

sys/dev/pci/drm/i915/i915_pci.c

560

BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),

sys/dev/pci/drm/i915/i915_pci.c

581

BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

55

if (HAS_ENGINE(to_gt(iter->i915), VCS1)) \