regress/sys/arch/amd64/vmm/vcpu.c

304

vrunp.vrp_exit->vrs.vrs_sregs[VCPU_REGS_SS].vsi_base,

regress/sys/arch/amd64/vmm/vcpu.c

65

.vrs_sregs[VCPU_REGS_SS] = { 0x0, 0xFFFF, 0x0093, 0x0},

sys/arch/amd64/amd64/vmm_machdep.c

1209

sregs[VCPU_REGS_SS].vsi_sel = vmcb->v_ss.vs_sel;

sys/arch/amd64/amd64/vmm_machdep.c

1210

sregs[VCPU_REGS_SS].vsi_limit = vmcb->v_ss.vs_lim;

sys/arch/amd64/amd64/vmm_machdep.c

1212

sregs[VCPU_REGS_SS].vsi_ar = (attr & 0xff) | ((attr << 4) &

sys/arch/amd64/amd64/vmm_machdep.c

1214

sregs[VCPU_REGS_SS].vsi_base = vmcb->v_ss.vs_base;

sys/arch/amd64/amd64/vmm_machdep.c

1488

vmcb->v_ss.vs_sel = sregs[VCPU_REGS_SS].vsi_sel;

sys/arch/amd64/amd64/vmm_machdep.c

1489

vmcb->v_ss.vs_lim = sregs[VCPU_REGS_SS].vsi_limit;

sys/arch/amd64/amd64/vmm_machdep.c

1490

attr = sregs[VCPU_REGS_SS].vsi_ar;

sys/arch/amd64/amd64/vmm_machdep.c

1492

vmcb->v_ss.vs_base = sregs[VCPU_REGS_SS].vsi_base;

usr.sbin/vmd/x86_mmio.c

358

case VCPU_REGS_SS: return "GS";

usr.sbin/vmd/x86_vm.c

127

.vrs_sregs[VCPU_REGS_SS] = { 0x0, 0xFFFF, 0x8093, 0x0},

usr.sbin/vmd/x86_vm.c

91

.vrs_sregs[VCPU_REGS_SS] = { 0x10, 0xFFFFFFFF, 0xC093, 0x0},