regress/sys/arch/amd64/vmm/vcpu.c

68

.vrs_sregs[VCPU_REGS_LDTR] = { 0x0, 0xFFFF, 0x0082, 0x0},

sys/arch/amd64/amd64/vmm_machdep.c

1216

sregs[VCPU_REGS_LDTR].vsi_sel = vmcb->v_ldtr.vs_sel;

sys/arch/amd64/amd64/vmm_machdep.c

1217

sregs[VCPU_REGS_LDTR].vsi_limit = vmcb->v_ldtr.vs_lim;

sys/arch/amd64/amd64/vmm_machdep.c

1219

sregs[VCPU_REGS_LDTR].vsi_ar = (attr & 0xff) | ((attr << 4)

sys/arch/amd64/amd64/vmm_machdep.c

1221

sregs[VCPU_REGS_LDTR].vsi_base = vmcb->v_ldtr.vs_base;

sys/arch/amd64/amd64/vmm_machdep.c

1493

vmcb->v_ldtr.vs_sel = sregs[VCPU_REGS_LDTR].vsi_sel;

sys/arch/amd64/amd64/vmm_machdep.c

1494

vmcb->v_ldtr.vs_lim = sregs[VCPU_REGS_LDTR].vsi_limit;

sys/arch/amd64/amd64/vmm_machdep.c

1495

attr = sregs[VCPU_REGS_LDTR].vsi_ar;

sys/arch/amd64/amd64/vmm_machdep.c

1497

vmcb->v_ldtr.vs_base = sregs[VCPU_REGS_LDTR].vsi_base;

usr.sbin/vmd/x86_mmio.c

359

case VCPU_REGS_LDTR: return "LDTR";

usr.sbin/vmd/x86_vm.c

130

.vrs_sregs[VCPU_REGS_LDTR] = { 0x0, 0xFFFF, 0x0082, 0x0},

usr.sbin/vmd/x86_vm.c

94

.vrs_sregs[VCPU_REGS_LDTR] = { 0x0, 0xFFFF, 0x0082, 0x0},