regress/sys/arch/amd64/vmm/vcpu.c

64

.vrs_sregs[VCPU_REGS_GS] = { 0x0, 0xFFFF, 0x0093, 0x0},

sys/arch/amd64/amd64/vmm_machdep.c

1202

sregs[VCPU_REGS_GS].vsi_sel = vmcb->v_gs.vs_sel;

sys/arch/amd64/amd64/vmm_machdep.c

1203

sregs[VCPU_REGS_GS].vsi_limit = vmcb->v_gs.vs_lim;

sys/arch/amd64/amd64/vmm_machdep.c

1205

sregs[VCPU_REGS_GS].vsi_ar = (attr & 0xff) | ((attr << 4) &

sys/arch/amd64/amd64/vmm_machdep.c

1207

sregs[VCPU_REGS_GS].vsi_base = vmcb->v_gs.vs_base;

sys/arch/amd64/amd64/vmm_machdep.c

1483

vmcb->v_gs.vs_sel = sregs[VCPU_REGS_GS].vsi_sel;

sys/arch/amd64/amd64/vmm_machdep.c

1484

vmcb->v_gs.vs_lim = sregs[VCPU_REGS_GS].vsi_limit;

sys/arch/amd64/amd64/vmm_machdep.c

1485

attr = sregs[VCPU_REGS_GS].vsi_ar;

sys/arch/amd64/amd64/vmm_machdep.c

1487

vmcb->v_gs.vs_base = sregs[VCPU_REGS_GS].vsi_base;

usr.sbin/vmd/x86_mmio.c

357

case VCPU_REGS_GS: return "GS";

usr.sbin/vmd/x86_vm.c

126

.vrs_sregs[VCPU_REGS_GS] = { 0x0, 0xFFFF, 0x8093, 0x0},

usr.sbin/vmd/x86_vm.c

90

.vrs_sregs[VCPU_REGS_GS] = { 0x10, 0xFFFFFFFF, 0xC093, 0x0},