sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1252

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1269

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1322

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1351

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1377

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1411

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1993

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK) != 1;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

2025

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK) != 1;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

805

data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1189

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1202

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1308

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1356

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

821

data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1016

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1183

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1556

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1569

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1643

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1644

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1675

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1720

UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON, UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1726

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1039

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1605

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1618

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1732

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1783

UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON, UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

733

data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1007

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1579

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1586

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1715

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1728

UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON, UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

693

data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1368

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1375

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

857

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1241

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1248

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1378

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1392

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

644

data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

922

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

1106

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

613

data &= ~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

706

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

973

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

1147

UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

682

~UVD_POWER_STATUS__UVD_POWER_STATUS_MASK);