sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

735

WREG32_P(mmUVD_POWER_STATUS, 0, ~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

967

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1040

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1273

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1206

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

865

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1019

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1573

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1042

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1622

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1010

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1590

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1379

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

860

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1252

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

925

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

710

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

981

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

1155

~UVD_POWER_STATUS__UVD_PG_MODE_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

686

tmp |= UVD_POWER_STATUS__UVD_PG_MODE_MASK;