sys/dev/pci/drm/amd/amdgpu/jpeg_v2_0.c

262

data &= ~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK;

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

346

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

411

UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK,

sys/dev/pci/drm/amd/amdgpu/jpeg_v2_5.c

412

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v3_0.c

308

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v3_0.c

321

UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK,

sys/dev/pci/drm/amd/amdgpu/jpeg_v3_0.c

322

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c

345

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c

358

UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0.c

359

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

556

0, ~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

647

UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

648

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c

385

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c

398

UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK,

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c

399

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_5.c

428

reg_data &= ~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK;

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c

280

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c

289

UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK,

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_0.c

290

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c

372

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c

397

UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK,

sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c

398

~UVD_JPEG_POWER_STATUS__JPEG_POWER_STATUS_MASK);