sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1314

(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1329

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1330

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

1374

if (!(reg_data & UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK))

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1304

(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1318

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

1319

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1671

(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1686

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1687

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1728

(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1741

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1742

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1711

(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1724

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1725

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1374

(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1387

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

1388

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

1102

(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

1115

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

1116

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

635

(~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

644

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK,

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

645

UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);