Symbol: BIOS_CMD_TABLE_PARA_REVISION
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
121
BIOS_CMD_TABLE_PARA_REVISION(DIGxEncoderControl);
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1298
switch (BIOS_CMD_TABLE_PARA_REVISION(EnableSpreadSpectrumOnPPLL)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1313
BIOS_CMD_TABLE_PARA_REVISION(EnableSpreadSpectrumOnPPLL));
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1501
switch (BIOS_CMD_TABLE_PARA_REVISION(AdjustDisplayPll)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1510
BIOS_CMD_TABLE_PARA_REVISION(AdjustDisplayPll));
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
155
if (1 == BIOS_CMD_TABLE_PARA_REVISION(DIG1EncoderControl))
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
160
if (1 == BIOS_CMD_TABLE_PARA_REVISION(DIG2EncoderControl))
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1633
switch (BIOS_CMD_TABLE_PARA_REVISION(DAC1EncoderControl)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1641
switch (BIOS_CMD_TABLE_PARA_REVISION(DAC2EncoderControl)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1727
switch (BIOS_CMD_TABLE_PARA_REVISION(DAC1OutputControl)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1735
switch (BIOS_CMD_TABLE_PARA_REVISION(DAC2OutputControl)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1797
BIOS_CMD_TABLE_PARA_REVISION(SetCRTC_UsingDTDTiming);
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1811
switch (BIOS_CMD_TABLE_PARA_REVISION(SetCRTC_Timing)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1817
BIOS_CMD_TABLE_PARA_REVISION(SetCRTC_Timing));
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1992
switch (BIOS_CMD_TABLE_PARA_REVISION(EnableCRTC)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
1998
BIOS_CMD_TABLE_PARA_REVISION(EnableCRTC));
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
2044
switch (BIOS_CMD_TABLE_PARA_REVISION(EnableCRTCMemReq)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
2097
switch (BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
2106
BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock));
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
2197
switch (BIOS_CMD_TABLE_PARA_REVISION(ExternalEncoderControl)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
2325
switch (BIOS_CMD_TABLE_PARA_REVISION(EnableDispPowerGating)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
2332
BIOS_CMD_TABLE_PARA_REVISION(EnableDispPowerGating));
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
2375
switch (BIOS_CMD_TABLE_PARA_REVISION(SetDCEClock)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
2381
BIOS_CMD_TABLE_PARA_REVISION(SetDCEClock));
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
953
switch (BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table.c
968
BIOS_CMD_TABLE_PARA_REVISION(SetPixelClock));
sys/dev/pci/drm/amd/display/dc/bios/command_table2.c
451
switch (BIOS_CMD_TABLE_PARA_REVISION(setpixelclock)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table2.c
592
BIOS_CMD_TABLE_PARA_REVISION(setcrtc_usingdtdtiming);
sys/dev/pci/drm/amd/display/dc/bios/command_table2.c
711
switch (BIOS_CMD_TABLE_PARA_REVISION(enablecrtc)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table2.c
771
switch (BIOS_CMD_TABLE_PARA_REVISION(externalencodercontrol)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table2.c
811
switch (BIOS_CMD_TABLE_PARA_REVISION(enabledisppowergating)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table2.c
818
BIOS_CMD_TABLE_PARA_REVISION(enabledisppowergating));
sys/dev/pci/drm/amd/display/dc/bios/command_table2.c
902
switch (BIOS_CMD_TABLE_PARA_REVISION(setdceclock)) {
sys/dev/pci/drm/amd/display/dc/bios/command_table2.c
97
BIOS_CMD_TABLE_PARA_REVISION(digxencodercontrol);