sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

2210

for (mapping = amdgpu_vm_it_iter_first(&vm->va, 0, U64_MAX); mapping;

sys/dev/pci/drm/amd/amdgpu/amdgpu_vm.c

2211

mapping = amdgpu_vm_it_iter_next(mapping, 0, U64_MAX)) {

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

250

0, "AMD_PLANE_HDR_MULT", 0, U64_MAX);

sys/dev/pci/drm/amd/pm/swsmu/smu_cmn.c

901

uint64_t features_to_disable = U64_MAX;

sys/dev/pci/drm/drm_edid.c

5328

map = U64_MAX;

sys/dev/pci/drm/drm_mm.c

742

scan->hit_start = U64_MAX;

sys/dev/pci/drm/drm_mode_config.c

306

"OUT_FENCE_PTR", 0, U64_MAX);

sys/dev/pci/drm/i915/display/intel_dpll_mgr.c

1688

.min_deviation = U64_MAX,

sys/dev/pci/drm/i915/display/intel_fbc.c

811

end = U64_MAX;

sys/dev/pci/drm/i915/gem/i915_gem_stolen.c

68

U64_MAX);

sys/dev/pci/drm/i915/gem/selftests/huge_pages.c

1230

max = U64_MAX;

sys/dev/pci/drm/i915/gem/selftests/i915_gem_client_blt.c

564

0, U64_MAX,

sys/dev/pci/drm/i915/i915_config.h

20

return i915_fence_context_timeout(i915, U64_MAX);

sys/dev/pci/drm/i915/i915_gem_gtt.c

207

GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));

sys/dev/pci/drm/i915/i915_vma_resource.c

409

U64_MAX);

sys/dev/pci/drm/i915/selftests/i915_gem_evict.c

124

0, U64_MAX,

sys/dev/pci/drm/i915/selftests/i915_gem_evict.c

139

0, U64_MAX,

sys/dev/pci/drm/i915/selftests/i915_vma.c

278

INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | round_down(U64_MAX, PAGE_SIZE)),

sys/dev/pci/drm/i915/selftests/i915_vma.c

288

NOSPACE(round_down(U64_MAX, PAGE_SIZE), PIN_GLOBAL),

sys/dev/pci/drm/i915/selftests/i915_vma.c

291

INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (round_down(U64_MAX, PAGE_SIZE) - 4096)),

sys/dev/pci/drm/i915/selftests/mock_gtt.c

75

ppgtt->vm.total = round_down(U64_MAX, PAGE_SIZE);

sys/dev/pci/drm/include/drm/drm_mm.h

440

0, U64_MAX, mode);

sys/dev/pci/drm/include/drm/drm_mm.h

540

0, U64_MAX, mode);