sys/dev/pci/drm/i915/display/intel_pch_display.c

112

enabled = !!(val & TRANS_ENABLE);

sys/dev/pci/drm/i915/display/intel_pch_display.c

307

intel_de_write(display, reg, val | TRANS_ENABLE);

sys/dev/pci/drm/i915/display/intel_pch_display.c

327

intel_de_rmw(display, reg, TRANS_ENABLE, 0);

sys/dev/pci/drm/i915/display/intel_pch_display.c

506

if ((intel_de_read(display, PCH_TRANSCONF(pipe)) & TRANS_ENABLE) == 0)

sys/dev/pci/drm/i915/display/intel_pch_display.c

565

val = TRANS_ENABLE;

sys/dev/pci/drm/i915/display/intel_pch_display.c

582

intel_de_rmw(display, LPT_TRANSCONF, TRANS_ENABLE, 0);

sys/dev/pci/drm/i915/display/intel_pch_display.c

625

if ((intel_de_read(display, LPT_TRANSCONF) & TRANS_ENABLE) == 0)

sys/dev/pci/drm/i915/gvt/handlers.c

409

if (vgpu_vreg(vgpu, offset) & TRANS_ENABLE)