sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9079

TIME_STAMP_INT_ENABLE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9085

TIME_STAMP_INT_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9132

TIME_STAMP_INT_ENABLE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

9138

TIME_STAMP_INT_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6336

TIME_STAMP_INT_ENABLE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6344

TIME_STAMP_INT_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6393

TIME_STAMP_INT_ENABLE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

6401

TIME_STAMP_INT_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4718

TIME_STAMP_INT_ENABLE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4726

TIME_STAMP_INT_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4769

TIME_STAMP_INT_ENABLE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v12_0.c

4777

TIME_STAMP_INT_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v8_0.c

6362

WREG32_FIELD(CP_INT_CNTL_RING0, TIME_STAMP_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5941

TIME_STAMP_INT_ENABLE,

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5988

TIME_STAMP_INT_ENABLE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5994

TIME_STAMP_INT_ENABLE, 1);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3104

TIME_STAMP_INT_ENABLE, 0);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

3110

TIME_STAMP_INT_ENABLE, 1);

sys/dev/pci/drm/radeon/cik.c

7051

cp_m1p0 = RREG32(CP_ME1_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7052

cp_m1p1 = RREG32(CP_ME1_PIPE1_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7053

cp_m1p2 = RREG32(CP_ME1_PIPE2_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7054

cp_m1p3 = RREG32(CP_ME1_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7055

cp_m2p0 = RREG32(CP_ME2_PIPE0_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7056

cp_m2p1 = RREG32(CP_ME2_PIPE1_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7057

cp_m2p2 = RREG32(CP_ME2_PIPE2_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7058

cp_m2p3 = RREG32(CP_ME2_PIPE3_INT_CNTL) & ~TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7063

cp_int_cntl |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7071

cp_m1p0 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7074

cp_m1p1 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7077

cp_m1p2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7080

cp_m1p2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7089

cp_m2p0 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7092

cp_m2p1 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7095

cp_m2p2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7098

cp_m2p2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7114

cp_m1p0 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7117

cp_m1p1 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7120

cp_m1p2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7123

cp_m1p2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7132

cp_m2p0 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7135

cp_m2p1 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7138

cp_m2p2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/cik.c

7141

cp_m2p2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/evergreen.c

4524

cp_int_cntl |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/evergreen.c

4528

cp_int_cntl1 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/evergreen.c

4532

cp_int_cntl2 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/evergreen.c

4538

cp_int_cntl |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/r600.c

3822

cp_int_cntl |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/si.c

6063

cp_int_cntl |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/si.c

6067

cp_int_cntl1 |= TIME_STAMP_INT_ENABLE;

sys/dev/pci/drm/radeon/si.c

6071

cp_int_cntl2 |= TIME_STAMP_INT_ENABLE;