TIMELINE_SEQNO_BYTES
memset(hwsp_seqno + 1, 0, TIMELINE_SEQNO_BYTES - sizeof(*hwsp_seqno));
drm_clflush_virt_range(hwsp_seqno, TIMELINE_SEQNO_BYTES);
u32 next_ofs = offset_in_page(tl->hwsp_offset + TIMELINE_SEQNO_BYTES);
if (TIMELINE_SEQNO_BYTES <= BIT(5) && (next_ofs & BIT(5)))
timeline->hwsp_seqno = memset(vaddr + ofs, 0, TIMELINE_SEQNO_BYTES);
drm_clflush_virt_range(vaddr + ofs, TIMELINE_SEQNO_BYTES);
count < (PAGE_SIZE / TIMELINE_SEQNO_BYTES - 1) / 2);
return (address + offset_in_page(tl->hwsp_offset)) / TIMELINE_SEQNO_BYTES;
#define CACHELINES_PER_PAGE (PAGE_SIZE / TIMELINE_SEQNO_BYTES / 2)