SXICMS4
SXICMS4(sc, SXIAHCI_PHYCS0, 7 << 24,
SXICMS4(sc, SXIAHCI_PHYCS1,
SXICMS4(sc, SXIAHCI_PHYCS0, 0x07 << 20, 0x03 << 20);
SXICMS4(sc, SXIAHCI_PHYCS2, 0x1f << 5, 0x19 << 5);
SXICMS4(sc, SXIE_MACMCFG, 15 << 2, 13 << 2);
SXICMS4(sc, SXIE_TXMODE, 3, 1); /* cpu mode */
SXICMS4(sc, SXIE_RXCR, clr_m, set_m);
SXICMS4(sc, SXIE_MACCR1, clr_m, set_m);
SXICMS4(sc, SXIE_MACCR1, 1, phyreg >> 8 & 1);
SXICMS4(sc, SXIE_MACSUPP, 1 << 8, (phyreg >> 13 & 1) << 8);
SXICMS4(sc, 0, CCU_GMAC_CLK_PIT|CCU_GMAC_CLK_TCS,
SXICMS4(sc, 0, CCU_GMAC_CLK_PIT|CCU_GMAC_CLK_TCS,
SXICMS4(sc, SXIPIO_CFG(port, pin), mask, mux << off);
SXICMS4(sc, SXIPIO_DRV(port, pin), mask, drive << off);
SXICMS4(sc, SXIPIO_PUL(port, pin), mask, pull << off);
SXICMS4(sc, SXIPIO_CFG(port, pin), 0x7 << off, mux << off);
SXICMS4(sc, SXIPIO_GRP_CFG(port), SXIPIO_IO_BIAS_MASK, bias);
SXICMS4(sc, sc->sc_hhmmss, 0xe0000000 | 0x1f0000 | 0x3f00 | 0x3f,
SXICMS4(sc, sc->sc_yymmdd, 0xffff, tv->tv_sec / SECDAY);
SXICMS4(sc, sc->sc_yymmdd, 0x00400000 | (sc->year_mask << 16) |