sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

364

REG_UPDATE(DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, 0x1);

sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.c

369

REG_UPDATE(DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, 0x0);

sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

286

HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, mask_sh),\

sys/dev/pci/drm/amd/display/dc/hubp/dcn10/dcn10_hubp.h

487

type SURFACE_FLIP_IN_STEREOSYNC;\

sys/dev/pci/drm/amd/display/dc/hubp/dcn21/dcn21_hubp.c

603

SURFACE_FLIP_IN_STEREOSYNC, flip_regs->grph_stereo);

sys/dev/pci/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

86

REG_UPDATE(DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, 0x1);

sys/dev/pci/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.c

91

REG_UPDATE(DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, 0x0);

sys/dev/pci/drm/amd/display/dc/hubp/dcn30/dcn30_hubp.h

80

HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, mask_sh),\

sys/dev/pci/drm/amd/display/dc/hubp/dcn31/dcn31_hubp.h

64

HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, mask_sh),\

sys/dev/pci/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

427

REG_UPDATE(DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, 0x1);

sys/dev/pci/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.c

432

REG_UPDATE(DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, 0x0);

sys/dev/pci/drm/amd/display/dc/hubp/dcn401/dcn401_hubp.h

71

HUBP_SF(HUBPREQ0_DCSURF_FLIP_CONTROL, SURFACE_FLIP_IN_STEREOSYNC, mask_sh),\