Symbol: BASE
games/phantasia/macros.h
8
#define ROLL(BASE,INTERVAL) floor((BASE) + (INTERVAL) * drandom())
games/trek/dock.c
74
if (Sect[i][j] == BASE)
games/trek/initquad.c
106
Sect[rx][ry] = BASE;
games/trek/nova.c
108
case BASE:
games/trek/ram.c
72
case BASE:
games/trek/torped.c
195
case BASE:
lib/libz/adler32.c
146
sum1 += (adler2 & 0xffff) + BASE - 1;
lib/libz/adler32.c
147
sum2 += ((adler1 >> 16) & 0xffff) + ((adler2 >> 16) & 0xffff) + BASE - rem;
lib/libz/adler32.c
148
if (sum1 >= BASE) sum1 -= BASE;
lib/libz/adler32.c
149
if (sum1 >= BASE) sum1 -= BASE;
lib/libz/adler32.c
150
if (sum2 >= ((unsigned long)BASE << 1)) sum2 -= ((unsigned long)BASE << 1);
lib/libz/adler32.c
151
if (sum2 >= BASE) sum2 -= BASE;
lib/libz/adler32.c
32
if (a >= BASE) a -= BASE; \
lib/libz/adler32.c
50
if (a >= BASE) a -= BASE; \
lib/libz/adler32.c
53
# define MOD(a) a %= BASE
lib/libz/adler32.c
54
# define MOD28(a) a %= BASE
lib/libz/adler32.c
55
# define MOD63(a) a %= BASE
lib/libz/adler32.c
70
if (adler >= BASE)
lib/libz/adler32.c
71
adler -= BASE;
lib/libz/adler32.c
73
if (sum2 >= BASE)
lib/libz/adler32.c
74
sum2 -= BASE;
lib/libz/adler32.c
88
if (adler >= BASE)
lib/libz/adler32.c
89
adler -= BASE;
sbin/newfs_ext2fs/mke2fs.c
584
delta = verbosity > 2 ? 0 : max_cols * BASE / ncg;
sbin/newfs_ext2fs/mke2fs.c
605
for (col += delta; col > BASE; col -= BASE)
sbin/newfs_ext2fs/mke2fs.c
625
delta = max_cols * BASE / delta;
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
54
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
50
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
60
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c
53
#define REG(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
96
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn351_clk_mgr.c
104
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
135
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c
53
#define REG(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
sys/dev/pci/drm/amd/display/dc/clk_mgr/dcn401/dcn401_clk_mgr.c
54
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/dce/dce_panel_cntl.h
46
.reg_name = BASE(mm ## block ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h
35
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h
39
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/dcn10/dcn10_dwb.h
44
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
61
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c
64
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c
52
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dce120/hw_translate_dce120.c
55
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
58
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c
61
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c
52
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn10/hw_translate_dcn10.c
55
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c
60
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_factory_dcn20.c
66
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn20/hw_translate_dcn20.c
56
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
58
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
64
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c
56
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
69
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
75
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c
63
BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c
64
BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_factory_dcn315.c
70
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn315/hw_translate_dcn315.c
56
BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
60
BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_factory_dcn32.c
66
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn32/hw_translate_dcn32.c
54
BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c
40
BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name
sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_factory_dcn401.c
46
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/gpio/dcn401/hw_translate_dcn401.c
29
BASE(reg ## reg_name ## _BASE_IDX) + reg ## reg_name
sys/dev/pci/drm/amd/display/dc/irq/dce120/irq_service_dce120.c
72
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c
169
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn20/irq_service_dcn20.c
172
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c
122
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
179
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn21/irq_service_dcn21.c
183
BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
188
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
192
BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
171
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn302/irq_service_dcn302.c
175
BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn303/irq_service_dcn303.c
117
BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
174
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn31/irq_service_dcn31.c
178
BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
176
(BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn314/irq_service_dcn314.c
180
(BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
181
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn315/irq_service_dcn315.c
185
BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
185
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c
189
BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
173
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn35/irq_service_dcn35.c
177
BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
152
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn351/irq_service_dcn351.c
156
BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
151
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn36/irq_service_dcn36.c
155
BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
165
BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/irq/dcn401/irq_service_dcn401.c
169
BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/mpc/dcn30/dcn30_mpc.h
39
.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
138
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
142
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dce120/dce120_resource.c
781
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
113
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
117
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
122
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
126
.reg_name[id] = BASE(mm ## reg_name ## 0 ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn10/dcn10_resource.c
805
generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
129
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
133
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
137
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
146
.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
150
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
154
.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
158
.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn20/dcn20_resource.c
985
generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
252
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
256
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
260
.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
264
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
271
.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
275
.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn201/dcn201_resource.c
842
generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
102
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
106
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
1083
generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
110
.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
114
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
118
.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn21/dcn21_resource.c
122
.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
118
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
122
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
126
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
130
.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
134
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
138
.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
142
.reg_name[id] = BASE(mm ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
149
.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
153
.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn30/dcn30_resource.c
965
generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
117
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
121
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
125
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
129
.var_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
133
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
137
.reg_name_pre ## _ ## reg_name_post[id] = BASE(mm ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
142
.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
146
.reg_name[id] = BASE(mm ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
153
.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
157
.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn301/dcn301_resource.c
936
generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
177
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
183
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
186
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
189
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
193
.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
197
.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
201
.reg_name[id] = BASE(mm ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
208
.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn302/dcn302_resource.c
933
generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
173
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
179
.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + mm ## block ## id ## _ ## reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
182
.reg_name = BASE(mm ## reg_name ## _BASE_IDX) + mm ## reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
185
.reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
189
.block ## _ ## reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
193
.reg_name[id] = BASE(mm ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
197
.reg_name[id] = BASE(mm ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
204
.RMU##_##reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn303/dcn303_resource.c
878
generic_reg_get(ctx, mmDC_PINSTRAPS + BASE(mmDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
1153
generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
129
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
133
.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
137
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
141
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
145
.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
149
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
153
.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
160
.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
164
.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn31/dcn31_resource.c
673
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
1211
generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
146
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
150
.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
154
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
158
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
162
.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
166
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
170
.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
177
.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
181
.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn314/dcn314_resource.c
680
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
1151
generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
163
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
167
.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
171
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
175
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
179
.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
183
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
187
.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
194
.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
198
.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn315/dcn315_resource.c
672
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
1145
generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
149
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
153
.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
157
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
161
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
165
.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
169
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
173
.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
180
.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
184
.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn316/dcn316_resource.c
667
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
118
REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
121
REG_STRUCT[id].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
127
REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
131
REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
135
REG_STRUCT[id-1].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
138
REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
142
REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
146
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
149
REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
153
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
157
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
161
REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
165
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
169
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
176
REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
180
REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn32/dcn32_resource.c
526
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
118
REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
121
REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
127
REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
131
REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
135
REG_STRUCT[id-1].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
138
REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
142
REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
146
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
149
REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
153
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
157
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
161
REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
165
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
169
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
173
REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
180
REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn321/dcn321_resource.c
522
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
1158
generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
132
REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
136
REG_STRUCT[id].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
142
REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
146
REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
150
REG_STRUCT[id-1].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
153
REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
157
REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
161
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
165
REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
169
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
173
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
177
REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
181
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
185
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
192
REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
196
REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn35/dcn35_resource.c
548
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
112
REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
1138
generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
116
REG_STRUCT[id].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
122
REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
126
REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
130
REG_STRUCT[id-1].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
133
REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
137
REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
141
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
145
REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
149
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
153
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
157
REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
161
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
165
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
172
REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
176
REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
528
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
1139
generic_reg_get(ctx, regDC_PINSTRAPS + BASE(regDC_PINSTRAPS_BASE_IDX),
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
117
REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
121
REG_STRUCT[id].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
127
REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
131
REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
135
REG_STRUCT[id-1].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
138
REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
142
REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
146
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
150
REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
154
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
158
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
162
REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
166
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
170
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
177
REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
181
REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn36/dcn36_resource.c
529
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
102
REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
108
REG_STRUCT.reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
112
REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
119
REG_STRUCT[id].reg_name = BASE(reg ## block ## id ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
122
REG_STRUCT[id-1].reg_name = BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
125
REG_STRUCT[id-1].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
129
REG_STRUCT[index].reg_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
133
.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
136
REG_STRUCT[id].reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
140
.var_name = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
144
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
148
REG_STRUCT[inst].reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
152
.RMU##_##reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
156
REG_STRUCT.reg_name[id] = BASE(reg ## block ## id ## _ ## temp_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
160
REG_STRUCT.block ## _ ## reg_name[id] = BASE(reg ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
167
REG_STRUCT.reg_name[id] = BASE(reg ## reg_name ## _ ## block ## id ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
501
.reg_name_pre ## _ ## reg_name_post[id] = BASE(reg ## reg_name_pre \
sys/dev/pci/drm/amd/display/dc/resource/dcn401/dcn401_resource.c
99
REG_STRUCT.reg_name = BASE(reg ## reg_name ## _BASE_IDX) + \
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn31.c
37
#define REG_OFFSET_EXP(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn314.c
43
#define REG_OFFSET_EXP(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn315.c
43
#define REG_OFFSET_EXP(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn316.c
43
#define REG_OFFSET_EXP(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn32.c
38
#define REG_OFFSET_EXP(reg_name) BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn35.c
38
#define REG_OFFSET_EXP(reg_name) BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn351.c
14
#define REG_OFFSET_EXP(reg_name) BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn36.c
14
#define REG_OFFSET_EXP(reg_name) BASE(reg##reg_name##_BASE_IDX) + reg##reg_name
sys/dev/pci/drm/amd/display/dmub/src/dmub_dcn401.c
17
#define REG_OFFSET_EXP(reg_name) (BASE(reg##reg_name##_BASE_IDX) + reg##reg_name)
sys/dev/pci/drm/amd/display/dmub/src/dmub_reg.h
37
#define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name)
sys/lib/libz/adler32.c
146
sum1 += (adler2 & 0xffff) + BASE - 1;
sys/lib/libz/adler32.c
147
sum2 += ((adler1 >> 16) & 0xffff) + ((adler2 >> 16) & 0xffff) + BASE - rem;
sys/lib/libz/adler32.c
148
if (sum1 >= BASE) sum1 -= BASE;
sys/lib/libz/adler32.c
149
if (sum1 >= BASE) sum1 -= BASE;
sys/lib/libz/adler32.c
150
if (sum2 >= ((unsigned long)BASE << 1)) sum2 -= ((unsigned long)BASE << 1);
sys/lib/libz/adler32.c
151
if (sum2 >= BASE) sum2 -= BASE;
sys/lib/libz/adler32.c
32
if (a >= BASE) a -= BASE; \
sys/lib/libz/adler32.c
50
if (a >= BASE) a -= BASE; \
sys/lib/libz/adler32.c
53
# define MOD(a) a %= BASE
sys/lib/libz/adler32.c
54
# define MOD28(a) a %= BASE
sys/lib/libz/adler32.c
55
# define MOD63(a) a %= BASE
sys/lib/libz/adler32.c
70
if (adler >= BASE)
sys/lib/libz/adler32.c
71
adler -= BASE;
sys/lib/libz/adler32.c
73
if (sum2 >= BASE)
sys/lib/libz/adler32.c
74
sum2 -= BASE;
sys/lib/libz/adler32.c
88
if (adler >= BASE)
sys/lib/libz/adler32.c
89
adler -= BASE;