sys/arch/sparc64/dev/ce4231.c

417

ce4231_write(sc, SP_PIN_CONTROL,

sys/arch/sparc64/dev/ce4231.c

418

ce4231_read(sc, SP_PIN_CONTROL) | INTERRUPT_ENABLE);

sys/arch/sparc64/dev/ce4231.c

430

ce4231_write(sc, SP_PIN_CONTROL,

sys/arch/sparc64/dev/ce4231.c

431

ce4231_read(sc, SP_PIN_CONTROL) & (~INTERRUPT_ENABLE));

sys/arch/sparc64/dev/ce4231.c

597

val = ce4231_read(sc, SP_PIN_CONTROL) & ~(XCTL0_ENABLE | XCTL1_ENABLE);

sys/arch/sparc64/dev/ce4231.c

602

ce4231_write(sc, SP_PIN_CONTROL, val);

sys/arch/sparc64/dev/ce4231.c

614

val = ce4231_read(sc, SP_PIN_CONTROL);

sys/dev/isa/ad1848.c

1051

ad_write(sc, SP_PIN_CONTROL,

sys/dev/isa/ad1848.c

1052

INTERRUPT_ENABLE | ad_read(sc, SP_PIN_CONTROL));

sys/dev/isa/ad1848.c

1084

ad_write(sc, SP_PIN_CONTROL,

sys/dev/isa/ad1848.c

1085

ad_read(sc, SP_PIN_CONTROL) & ~INTERRUPT_ENABLE);

sys/dev/sbus/cs4231.c

376

cs4231_write(sc, SP_PIN_CONTROL,

sys/dev/sbus/cs4231.c

377

cs4231_read(sc, SP_PIN_CONTROL) | INTERRUPT_ENABLE);

sys/dev/sbus/cs4231.c

387

pc = cs4231_read(sc, SP_PIN_CONTROL) | CS_PC_HDPHMUTE | CS_PC_LINEMUTE;

sys/dev/sbus/cs4231.c

423

cs4231_write(sc, SP_PIN_CONTROL, pc);

sys/dev/sbus/cs4231.c

459

cs4231_write(sc, SP_PIN_CONTROL,

sys/dev/sbus/cs4231.c

460

cs4231_read(sc, SP_PIN_CONTROL) & (~INTERRUPT_ENABLE));