sys/dev/pci/drm/amd/amdgpu/aldebaran_reg_init.c

48

adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/amdgpu_dev_coredump.c

61

[SMUIO_HWIP] = "SMUIO",

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

231

[SMUIO_HWIP] = SMUIO_HWID,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2602

adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2631

adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(9, 0, 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2661

adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2678

adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(10, 0, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2708

adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 2);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2745

adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 3);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2777

adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(13, 0, 2);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2810

adev->ip_versions[SMUIO_HWIP][0] = IP_VERSION(11, 0, 8);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

3052

switch (amdgpu_ip_version(adev, SMUIO_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/arct_reg_init.c

52

adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/cyan_skillfish_reg_init.c

51

adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/dimgrey_cavefish_reg_init.c

50

adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/gfx_v11_0.c

5182

if (amdgpu_ip_version(adev, SMUIO_HWIP, 0) < IP_VERSION(15, 0, 0)) {

sys/dev/pci/drm/amd/amdgpu/vega10_reg_init.c

49

adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/vega20_reg_init.c

48

adev->reg_offset[SMUIO_HWIP][i] = (uint32_t *)(&(SMUIO_BASE.instance[i]));