sys/dev/pci/cs4280.c

1434

mem = BA0READ4(sc, CS4280_CLKCR1) | CLKCR1_SWCE;

sys/dev/pci/cs4280.c

1453

while ((BA0READ4(sc, CS4280_ACSTS) & ACSTS_CRDY) == 0) {

sys/dev/pci/cs4280.c

1467

while ((BA0READ4(sc, CS4280_ACISV) & (ACISV_ISV3 | ACISV_ISV4)) !=

sys/dev/pci/cs4280.c

1556

mem = BA0READ4(sc, CS4280_MIDCR) & ~MIDCR_MASK;

sys/dev/pci/cs4280.c

1558

DPRINTF(("midi reset: 0x%x\n", BA0READ4(sc, CS4280_MIDCR)));

sys/dev/pci/cs4280.c

1602

mem = BA0READ4(sc, CS4280_CLKCR1);

sys/dev/pci/cs4280.c

1611

while (BA0READ4(sc, CS4280_SERBST) & SERBST_WBSY) {

sys/dev/pci/cs4280.c

1639

mem = BA0READ4(sc, CS4280_MIDCR) & ~MIDCR_MASK;

sys/dev/pci/cs4280.c

1643

if (mem != BA0READ4(sc, CS4280_MIDCR)) {

sys/dev/pci/cs4280.c

1644

DPRINTF(("midi_open: MIDCR=%d\n", BA0READ4(sc, CS4280_MIDCR)));

sys/dev/pci/cs4280.c

1647

DPRINTF(("MIDCR=0x%x\n", BA0READ4(sc, CS4280_MIDCR)));

sys/dev/pci/cs4280.c

1659

mem = BA0READ4(sc, CS4280_MIDCR);

sys/dev/pci/cs4280.c

1675

if ((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0) {

sys/dev/pci/cs4280.c

1676

mem = BA0READ4(sc, CS4280_MIDWP) & ~MIDWP_MASK;

sys/dev/pci/cs4280.c

1680

if (mem != BA0READ4(sc, CS4280_MIDWP)) {

sys/dev/pci/cs4280.c

1682

mem, BA0READ4(sc, CS4280_MIDWP)));

sys/dev/pci/cs4280.c

285

BA0READ4(sc, CS4280_ACSDA);

sys/dev/pci/cs4280.c

301

while (!(BA0READ4(sc, CS4280_ACSTS) & ACSTS_VSTS)) {

sys/dev/pci/cs4280.c

309

*data = BA0READ4(sc, CS4280_ACSDA);

sys/dev/pci/cs4280.c

339

while ((BA0READ4(sc, CS4280_ACCTL) & ACCTL_DCV)) {

sys/dev/pci/cs4280.c

652

intr = BA0READ4(sc, CS4280_HISR);

sys/dev/pci/cs4280.c

753

BA0READ4(sc, CS4280_MIDSR)));

sys/dev/pci/cs4280.c

756

((BA0READ4(sc, CS4280_MIDSR) & MIDSR_RBE) == 0)) {

sys/dev/pci/cs4280.c

757

data = BA0READ4(sc, CS4280_MIDRP) & MIDRP_MASK;

sys/dev/pci/cs4280.c

768

if ((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0) {

sys/dev/pci/cs4280.c

775

((BA0READ4(sc, CS4280_MIDSR) & MIDSR_TBF) == 0)) {

sys/dev/pci/cs4280.c

942

while (BA0READ4(sc, CS4280_ACISV) != (ACISV_ISV3 | ACISV_ISV4)) {

sys/dev/pci/cs4281.c

1009

while((BA0READ4(sc, CS4281_ACSTS) & ACSTS_CRDY) == 0) {

sys/dev/pci/cs4281.c

1020

while((BA0READ4(sc, CS4281_ACSTS2) & ACSTS2_CRDY2) == 0) {

sys/dev/pci/cs4281.c

1039

dat32 = BA0READ4(sc, CS4281_ACSTS) & ACSTS_CRDY;

sys/dev/pci/cs4281.c

1070

dat32 = BA0READ4(sc, CS4281_ACISV) & (ACISV_ISV3 | ACISV_ISV4) ;

sys/dev/pci/cs4281.c

1210

BA0READ4(sc, CS4281_ACSDA);

sys/dev/pci/cs4281.c

1227

while ((BA0READ4(sc, CS4281_ACSTS) & ACSTS_VSTS) == 0) {

sys/dev/pci/cs4281.c

1235

*ac97_data = BA0READ4(sc, CS4281_ACSDA);

sys/dev/pci/cs4281.c

1327

while ((BA0READ4(sc, CS4281_ACCTL) & ACCTL_DCV)) {

sys/dev/pci/cs4281.c

332

intr = BA0READ4(sc, CS4281_HISR);

sys/dev/pci/cs4281.c

341

val = BA0READ4(sc, CS4281_HDSR0); /* clear intr condition */

sys/dev/pci/cs4281.c

343

val = BA0READ4(sc, CS4281_HDSR1); /* clear intr condition */

sys/dev/pci/cs4281.c

348

DPRINTF((" PB DMA 0x%x(%d)", (int)BA0READ4(sc, CS4281_DCA0),

sys/dev/pci/cs4281.c

349

(int)BA0READ4(sc, CS4281_DCC0)));

sys/dev/pci/cs4281.c

360

val = BA0READ4(sc, CS4281_HDSR1);

sys/dev/pci/cs4281.c

362

DPRINTF((" CP DMA 0x%x(%d)", (int)BA0READ4(sc, CS4281_DCA1),

sys/dev/pci/cs4281.c

363

(int)BA0READ4(sc, CS4281_DCC1)));

sys/dev/pci/cs4281.c

436

BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) | DCRn_MSK);

sys/dev/pci/cs4281.c

448

BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) | DCRn_MSK);

sys/dev/pci/cs4281.c

484

BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) | DCRn_MSK);

sys/dev/pci/cs4281.c

509

fmt = BA0READ4(sc, CS4281_DMR0) & ~DMRn_FMTMSK;

sys/dev/pci/cs4281.c

527

BA0WRITE4(sc, CS4281_DCR0, BA0READ4(sc, CS4281_DCR0) & ~DCRn_MSK);

sys/dev/pci/cs4281.c

534

DPRINTF(("HICR =0x%08x(expected 0x00000001)\n", BA0READ4(sc, CS4281_HICR)));

sys/dev/pci/cs4281.c

535

DPRINTF(("HIMR =0x%08x(expected 0x00f0fc3f)\n", BA0READ4(sc, CS4281_HIMR)));

sys/dev/pci/cs4281.c

536

DPRINTF(("DMR0 =0x%08x(expected 0x2???0018)\n", BA0READ4(sc, CS4281_DMR0)));

sys/dev/pci/cs4281.c

537

DPRINTF(("DCR0 =0x%08x(expected 0x00030000)\n", BA0READ4(sc, CS4281_DCR0)));

sys/dev/pci/cs4281.c

538

DPRINTF(("FCR0 =0x%08x(expected 0x81000f00)\n", BA0READ4(sc, CS4281_FCR0)));

sys/dev/pci/cs4281.c

540

BA0READ4(sc, CS4281_DACSR)));

sys/dev/pci/cs4281.c

541

DPRINTF(("SRCSA=0x%08x(expected 0x0b0a0100)\n", BA0READ4(sc, CS4281_SRCSA)));

sys/dev/pci/cs4281.c

543

BA0READ4(sc, CS4281_SSPM) & SSPM_PSRCEN));

sys/dev/pci/cs4281.c

576

BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) | DCRn_MSK);

sys/dev/pci/cs4281.c

597

fmt = BA0READ4(sc, CS4281_DMR1) & ~DMRn_FMTMSK;

sys/dev/pci/cs4281.c

615

BA0WRITE4(sc, CS4281_DCR1, BA0READ4(sc, CS4281_DCR1) & ~DCRn_MSK);

sys/dev/pci/cs4281.c

619

DPRINTF(("HICR=0x%08x\n", BA0READ4(sc, CS4281_HICR)));

sys/dev/pci/cs4281.c

620

DPRINTF(("HIMR=0x%08x\n", BA0READ4(sc, CS4281_HIMR)));

sys/dev/pci/cs4281.c

621

DPRINTF(("DMR1=0x%08x\n", BA0READ4(sc, CS4281_DMR1)));

sys/dev/pci/cs4281.c

622

DPRINTF(("DCR1=0x%08x\n", BA0READ4(sc, CS4281_DCR1)));

sys/dev/pci/cs4281.c

691

dat32 = BA0READ4(sc, CS4281_EPPMC);

sys/dev/pci/cs4281.c

730

while ((BA0READ4(sc, CS4281_CLKCR1)& (CLKCR1_DLLRDY | CLKCR1_CLKON))

sys/dev/pci/cs4281.c

742

while((BA0READ4(sc, CS4281_ACSTS) & ACSTS_CRDY) == 0) {

sys/dev/pci/cs4281.c

751

while((BA0READ4(sc, CS4281_ACSTS2) & ACSTS2_CRDY2) == 0) {

sys/dev/pci/cs4281.c

771

dat32 = BA0READ4(sc, CS4281_ACSTS) & ACSTS_CRDY;

sys/dev/pci/cs4281.c

802

dat32 = BA0READ4(sc, CS4281_ACISV) & (ACISV_ISV3 | ACISV_ISV4);

sys/dev/pci/cs4281.c

856

BA0WRITE4(sc, CS4281_FCR0, (BA0READ4(sc,CS4281_FCR0) & ~FCRn_FEN));

sys/dev/pci/cs4281.c

877

BA0WRITE4(sc, CS4281_FCR1, (BA0READ4(sc,CS4281_FCR1) & ~FCRn_FEN));

sys/dev/pci/cs4281.c

900

BA0WRITE4(sc, CS4281_FCR2, (BA0READ4(sc,CS4281_FCR2) & ~FCRn_FEN));

sys/dev/pci/cs4281.c

901

BA0WRITE4(sc, CS4281_FCR3, (BA0READ4(sc,CS4281_FCR3) & ~FCRn_FEN));

sys/dev/pci/cs4281.c

950

dat32 = BA0READ4(sc, CS4281_HIMR) & 0xfffbfcff;