Symbol: SMU_CAP
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
334
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(BOARD_VOLTAGE))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
341
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(PLDM_VERSION)) &&
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
345
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(NPM_METRICS)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
575
smu_v13_0_6_cap_supported(smu, SMU_CAP(TEMP_METRICS)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
579
return smu_v13_0_6_cap_supported(smu, SMU_CAP(TEMP_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
599
if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(NPM_METRICS)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
763
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(HST_LIMIT_METRICS))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c
909
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(HST_LIMIT_METRICS))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
1091
if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(DPM_POLICY))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
1279
smu_v13_0_6_cap_supported(smu, SMU_CAP(STATIC_METRICS)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
1286
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(DPM))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
1496
if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(SET_UCLK_MAX)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
1800
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(BOARD_VOLTAGE))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
1996
if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(MCA_DEBUG_MODE)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2142
SMU_CAP(SET_UCLK_MAX)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2346
if (ret == -EIO && !smu_v13_0_6_cap_supported(smu, SMU_CAP(DPM))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2665
smu_v13_0_6_cap_supported(smu, SMU_CAP(STATIC_METRICS)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2672
per_inst = smu_v13_0_6_cap_supported(smu, SMU_CAP(PER_INST_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2717
smu, SMU_CAP(HST_LIMIT_METRICS))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2766
smu_v13_0_6_cap_supported(smu, SMU_CAP(STATIC_METRICS)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2839
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(PCIE_METRICS))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2868
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(OTHER_END_METRICS)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2896
per_inst = smu_v13_0_6_cap_supported(smu, SMU_CAP(PER_INST_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
2928
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(HST_LIMIT_METRICS))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
296
enum smu_v13_0_6_caps default_cap_list[] = { SMU_CAP(DPM),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
297
SMU_CAP(SET_UCLK_MAX),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
298
SMU_CAP(DPM_POLICY),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
299
SMU_CAP(PCIE_METRICS),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
300
SMU_CAP(CTF_LIMIT),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
301
SMU_CAP(MCA_DEBUG_MODE),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
302
SMU_CAP(RMA_MSG),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
303
SMU_CAP(ACA_SYND) };
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
3048
if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(CTF_LIMIT)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
310
smu_v13_0_6_cap_set(smu, SMU_CAP(OTHER_END_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
312
smu_v13_0_6_cap_set(smu, SMU_CAP(PER_INST_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
314
smu_v13_0_6_cap_set(smu, SMU_CAP(SDMA_RESET));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
316
smu_v13_0_6_cap_set(smu, SMU_CAP(VCN_RESET));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
3168
if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(RMA_MSG)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
318
smu_v13_0_6_cap_set(smu, SMU_CAP(STATIC_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
319
smu_v13_0_6_cap_set(smu, SMU_CAP(BOARD_VOLTAGE));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
3191
if (!smu_v13_0_6_cap_supported(smu, SMU_CAP(SDMA_RESET))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
320
smu_v13_0_6_cap_set(smu, SMU_CAP(PLDM_VERSION));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
3219
return smu_v13_0_6_cap_supported(smu, SMU_CAP(VCN_RESET));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
326
enum smu_v13_0_6_caps default_cap_list[] = { SMU_CAP(DPM),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
327
SMU_CAP(PCIE_METRICS),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
328
SMU_CAP(CTF_LIMIT),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
329
SMU_CAP(MCA_DEBUG_MODE),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
330
SMU_CAP(RMA_MSG),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
331
SMU_CAP(ACA_SYND),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
332
SMU_CAP(OTHER_END_METRICS),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
333
SMU_CAP(PER_INST_METRICS) };
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
340
smu_v13_0_6_cap_clear(smu, SMU_CAP(DPM));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
343
smu_v13_0_6_cap_set(smu, SMU_CAP(SDMA_RESET));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
346
smu_v13_0_6_cap_set(smu, SMU_CAP(STATIC_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
349
smu_v13_0_6_cap_set(smu, SMU_CAP(HST_LIMIT_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
352
smu_v13_0_6_cap_set(smu, SMU_CAP(BOARD_VOLTAGE));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
353
smu_v13_0_6_cap_set(smu, SMU_CAP(PLDM_VERSION));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
3559
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(ACA_SYND))) {
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
357
smu_v13_0_6_cap_set(smu, SMU_CAP(VCN_RESET));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
361
smu_v13_0_6_cap_set(smu, SMU_CAP(TEMP_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
363
smu_v13_0_6_cap_set(smu, SMU_CAP(NPM_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
365
smu_v13_0_6_cap_set(smu, SMU_CAP(TEMP_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
373
enum smu_v13_0_6_caps default_cap_list[] = { SMU_CAP(DPM),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
374
SMU_CAP(SET_UCLK_MAX),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
375
SMU_CAP(DPM_POLICY),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
376
SMU_CAP(PCIE_METRICS),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
377
SMU_CAP(CTF_LIMIT),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
378
SMU_CAP(MCA_DEBUG_MODE),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
379
SMU_CAP(RMA_MSG),
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
380
SMU_CAP(ACA_SYND) };
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
3848
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(ACA_SYND)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
389
smu_v13_0_6_cap_clear(smu, SMU_CAP(DPM));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
391
smu_v13_0_6_cap_clear(smu, SMU_CAP(CTF_LIMIT));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
394
smu_v13_0_6_cap_clear(smu, SMU_CAP(PCIE_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
395
smu_v13_0_6_cap_clear(smu, SMU_CAP(DPM_POLICY));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
396
smu_v13_0_6_cap_clear(smu, SMU_CAP(RMA_MSG));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
397
smu_v13_0_6_cap_clear(smu, SMU_CAP(ACA_SYND));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
400
smu_v13_0_6_cap_set(smu, SMU_CAP(PER_INST_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
403
smu_v13_0_6_cap_set(smu, SMU_CAP(OTHER_END_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
405
smu_v13_0_6_cap_clear(smu, SMU_CAP(DPM_POLICY));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
407
smu_v13_0_6_cap_clear(smu, SMU_CAP(SET_UCLK_MAX));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
409
smu_v13_0_6_cap_clear(smu, SMU_CAP(PCIE_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
411
smu_v13_0_6_cap_clear(smu, SMU_CAP(MCA_DEBUG_MODE));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
413
smu_v13_0_6_cap_set(smu, SMU_CAP(PER_INST_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
415
smu_v13_0_6_cap_clear(smu, SMU_CAP(RMA_MSG));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
417
smu_v13_0_6_cap_clear(smu, SMU_CAP(ACA_SYND));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
420
smu_v13_0_6_cap_set(smu, SMU_CAP(HST_LIMIT_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
430
SMU_CAP(STATIC_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
432
SMU_CAP(BOARD_VOLTAGE));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
433
smu_v13_0_6_cap_set(smu, SMU_CAP(PLDM_VERSION));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
439
SMU_CAP(STATIC_METRICS));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
441
SMU_CAP(BOARD_VOLTAGE));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
445
smu_v13_0_6_cap_set(smu, SMU_CAP(PLDM_VERSION));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
451
smu_v13_0_6_cap_set(smu, SMU_CAP(SDMA_RESET));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
454
smu_v13_0_6_cap_set(smu, SMU_CAP(VCN_RESET));
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
827
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(PLDM_VERSION)) &&
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
869
smu_v13_0_6_cap_supported(smu, SMU_CAP(STATIC_METRICS)))
sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
943
if (smu_v13_0_6_cap_supported(smu, SMU_CAP(STATIC_METRICS))) {