Symbol: SMU75_Discrete_DpmTable
sys/dev/pci/drm/amd/pm/powerplay/inc/smu75_discrete.h
379
typedef struct SMU75_Discrete_DpmTable SMU75_Discrete_DpmTable;
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1042
offsetof(SMU75_Discrete_DpmTable, MemoryLevel);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1111
SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1195
SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1308
struct SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1365
struct SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1443
SMU75_Discrete_DpmTable *table = &(smu_data->smc_state_table);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1566
SMU75_Discrete_DpmTable *table = &(smu_data->smc_state_table);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1668
struct SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
1925
struct SMU75_Discrete_DpmTable *table = &(smu_data->smc_state_table);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
2135
offsetof(SMU75_Discrete_DpmTable, SystemFlags),
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
2137
sizeof(SMU75_Discrete_DpmTable) - 3 * sizeof(SMU75_PIDController),
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
2187
return offsetof(SMU75_Discrete_DpmTable, UvdBootLevel);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
2189
return offsetof(SMU75_Discrete_DpmTable, VceBootLevel);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
2191
return offsetof(SMU75_Discrete_DpmTable, LowSclkInterruptThreshold);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
2231
offsetof(SMU75_Discrete_DpmTable,
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
341
mm_boot_level_offset = smu_data->smu7_data.dpm_table_start + offsetof(SMU75_Discrete_DpmTable,
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
378
offsetof(SMU75_Discrete_DpmTable, VceBootLevel);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
449
SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
476
struct SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
501
struct SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
530
struct SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
563
struct SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
569
struct SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
670
SMU75_Discrete_DpmTable *table)
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
723
const SMU75_Discrete_DpmTable *table = &(smu_data->smc_state_table);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.c
875
offsetof(SMU75_Discrete_DpmTable, GraphicsLevel);
sys/dev/pci/drm/amd/pm/powerplay/smumgr/vegam_smumgr.h
66
SMU75_Discrete_DpmTable smc_state_table;