sys/dev/pci/drm/amd/pm/powerplay/inc/smu72_discrete.h

364

uint32_t value[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];

sys/dev/pci/drm/amd/pm/powerplay/inc/smu72_discrete.h

372

SMU72_Discrete_MCRegisterAddress address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2073

i < SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE,

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2950

PP_ASSERT_WITH_CODE((table->last <= SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE),

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2982

PP_ASSERT_WITH_CODE((j < SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE),

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

2999

PP_ASSERT_WITH_CODE((j < SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE),

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.c

3015

PP_ASSERT_WITH_CODE((j < SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE),

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.h

51

uint32_t mc_data[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];

sys/dev/pci/drm/amd/pm/powerplay/smumgr/tonga_smumgr.h

59

SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE];