SMMU_SGFSR
smmu_gr0_write_4(sc, SMMU_SGFSR, smmu_gr0_read_4(sc, SMMU_SGFSR));
reg = smmu_gr0_read_4(sc, SMMU_SGFSR);
smmu_gr0_write_4(sc, SMMU_SGFSR, reg);