sys/dev/pci/drm/i915/display/intel_cdclk.c

1000

case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2700, SKL_DPLL0):

sys/dev/pci/drm/i915/display/intel_cdclk.c

1003

case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080, SKL_DPLL0):

sys/dev/pci/drm/i915/display/intel_cdclk.c

1004

case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_2160, SKL_DPLL0):

sys/dev/pci/drm/i915/display/intel_cdclk.c

1008

MISSING_CASE(val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0));

sys/dev/pci/drm/i915/display/intel_cdclk.c

1104

return DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1080, SKL_DPLL0);

sys/dev/pci/drm/i915/display/intel_cdclk.c

1106

return DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, SKL_DPLL0);

sys/dev/pci/drm/i915/display/intel_cdclk.c

1112

DPLL_CTRL1_HDMI_MODE(SKL_DPLL0) |

sys/dev/pci/drm/i915/display/intel_cdclk.c

1113

DPLL_CTRL1_SSC(SKL_DPLL0) |

sys/dev/pci/drm/i915/display/intel_cdclk.c

1114

DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0),

sys/dev/pci/drm/i915/display/intel_cdclk.c

1115

DPLL_CTRL1_OVERRIDE(SKL_DPLL0) |

sys/dev/pci/drm/i915/display/intel_cdclk.c

990

(val & (DPLL_CTRL1_HDMI_MODE(SKL_DPLL0) |

sys/dev/pci/drm/i915/display/intel_cdclk.c

991

DPLL_CTRL1_SSC(SKL_DPLL0) |

sys/dev/pci/drm/i915/display/intel_cdclk.c

992

DPLL_CTRL1_OVERRIDE(SKL_DPLL0))) !=

sys/dev/pci/drm/i915/display/intel_cdclk.c

993

DPLL_CTRL1_OVERRIDE(SKL_DPLL0)))

sys/dev/pci/drm/i915/display/intel_cdclk.c

996

switch (val & DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0)) {

sys/dev/pci/drm/i915/display/intel_cdclk.c

997

case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_810, SKL_DPLL0):

sys/dev/pci/drm/i915/display/intel_cdclk.c

998

case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1350, SKL_DPLL0):

sys/dev/pci/drm/i915/display/intel_cdclk.c

999

case DPLL_CTRL1_LINK_RATE(DPLL_CTRL1_LINK_RATE_1620, SKL_DPLL0):