Symbol: SH4_PCIC
sys/arch/sh/dev/pcicreg.h
100
#define SH4_PCIWCR1 (SH4_PCIC+0x1e8) /* 32bit */
sys/arch/sh/dev/pcicreg.h
101
#define SH4_PCIWCR2 (SH4_PCIC+0x1ec) /* 32bit */
sys/arch/sh/dev/pcicreg.h
102
#define SH4_PCIWCR3 (SH4_PCIC+0x1f0) /* 32bit */
sys/arch/sh/dev/pcicreg.h
103
#define SH4_PCIMCR (SH4_PCIC+0x1f4) /* 32bit */
sys/arch/sh/dev/pcicreg.h
104
#define SH4_PCIBCR3 (SH4_PCIC+0x1f8) /* 32bit: SH7751R */
sys/arch/sh/dev/pcicreg.h
105
#define SH4_PCIPCTR (SH4_PCIC+0x200) /* 32bit */
sys/arch/sh/dev/pcicreg.h
106
#define SH4_PCIPDTR (SH4_PCIC+0x204) /* 32bit */
sys/arch/sh/dev/pcicreg.h
107
#define SH4_PCIPDR (SH4_PCIC+0x220) /* 32bit */
sys/arch/sh/dev/pcicreg.h
45
#define SH4_PCICONF (SH4_PCIC+0x000) /* 32bit */
sys/arch/sh/dev/pcicreg.h
64
#define SH4_PCICR (SH4_PCIC+0x100) /* 32bit */
sys/arch/sh/dev/pcicreg.h
65
#define SH4_PCILSR0 (SH4_PCIC+0x104) /* 32bit */
sys/arch/sh/dev/pcicreg.h
66
#define SH4_PCILSR1 (SH4_PCIC+0x108) /* 32bit */
sys/arch/sh/dev/pcicreg.h
67
#define SH4_PCILAR0 (SH4_PCIC+0x10c) /* 32bit */
sys/arch/sh/dev/pcicreg.h
68
#define SH4_PCILAR1 (SH4_PCIC+0x110) /* 32bit */
sys/arch/sh/dev/pcicreg.h
69
#define SH4_PCIINT (SH4_PCIC+0x114) /* 32bit */
sys/arch/sh/dev/pcicreg.h
70
#define SH4_PCIINTM (SH4_PCIC+0x118) /* 32bit */
sys/arch/sh/dev/pcicreg.h
71
#define SH4_PCIALR (SH4_PCIC+0x11c) /* 32bit */
sys/arch/sh/dev/pcicreg.h
72
#define SH4_PCICLR (SH4_PCIC+0x120) /* 32bit */
sys/arch/sh/dev/pcicreg.h
73
#define SH4_PCIAINT (SH4_PCIC+0x130) /* 32bit */
sys/arch/sh/dev/pcicreg.h
74
#define SH4_PCIAINTM (SH4_PCIC+0x134) /* 32bit */
sys/arch/sh/dev/pcicreg.h
75
#define SH4_PCIDMABT (SH4_PCIC+0x140) /* 32bit */
sys/arch/sh/dev/pcicreg.h
76
#define SH4_PCIDPA0 (SH4_PCIC+0x180) /* 32bit */
sys/arch/sh/dev/pcicreg.h
77
#define SH4_PCIDLA0 (SH4_PCIC+0x184) /* 32bit */
sys/arch/sh/dev/pcicreg.h
78
#define SH4_PCIDTC0 (SH4_PCIC+0x188) /* 32bit */
sys/arch/sh/dev/pcicreg.h
79
#define SH4_PCIDCR0 (SH4_PCIC+0x18c) /* 32bit */
sys/arch/sh/dev/pcicreg.h
80
#define SH4_PCIDPA1 (SH4_PCIC+0x190) /* 32bit */
sys/arch/sh/dev/pcicreg.h
81
#define SH4_PCIDLA1 (SH4_PCIC+0x194) /* 32bit */
sys/arch/sh/dev/pcicreg.h
82
#define SH4_PCIDTC1 (SH4_PCIC+0x198) /* 32bit */
sys/arch/sh/dev/pcicreg.h
83
#define SH4_PCIDCR1 (SH4_PCIC+0x19c) /* 32bit */
sys/arch/sh/dev/pcicreg.h
84
#define SH4_PCIDPA2 (SH4_PCIC+0x1a0) /* 32bit */
sys/arch/sh/dev/pcicreg.h
85
#define SH4_PCIDLA2 (SH4_PCIC+0x1a4) /* 32bit */
sys/arch/sh/dev/pcicreg.h
86
#define SH4_PCIDTC2 (SH4_PCIC+0x1a8) /* 32bit */
sys/arch/sh/dev/pcicreg.h
87
#define SH4_PCIDCR2 (SH4_PCIC+0x1ac) /* 32bit */
sys/arch/sh/dev/pcicreg.h
88
#define SH4_PCIDPA3 (SH4_PCIC+0x1b0) /* 32bit */
sys/arch/sh/dev/pcicreg.h
89
#define SH4_PCIDLA3 (SH4_PCIC+0x1b4) /* 32bit */
sys/arch/sh/dev/pcicreg.h
90
#define SH4_PCIDTC3 (SH4_PCIC+0x1b8) /* 32bit */
sys/arch/sh/dev/pcicreg.h
91
#define SH4_PCIDCR3 (SH4_PCIC+0x1bc) /* 32bit */
sys/arch/sh/dev/pcicreg.h
92
#define SH4_PCIPAR (SH4_PCIC+0x1c0) /* 32bit */
sys/arch/sh/dev/pcicreg.h
93
#define SH4_PCIMBR (SH4_PCIC+0x1c4) /* 32bit */
sys/arch/sh/dev/pcicreg.h
94
#define SH4_PCIIOBR (SH4_PCIC+0x1c8) /* 32bit */
sys/arch/sh/dev/pcicreg.h
95
#define SH4_PCIPINT (SH4_PCIC+0x1cc) /* 32bit */
sys/arch/sh/dev/pcicreg.h
96
#define SH4_PCIPINTM (SH4_PCIC+0x1d0) /* 32bit */
sys/arch/sh/dev/pcicreg.h
97
#define SH4_PCICLKR (SH4_PCIC+0x1d4) /* 32bit */
sys/arch/sh/dev/pcicreg.h
98
#define SH4_PCIBCR1 (SH4_PCIC+0x1e0) /* 32bit */
sys/arch/sh/dev/pcicreg.h
99
#define SH4_PCIBCR2 (SH4_PCIC+0x1e4) /* 32bit */