Symbol: SDMA1_HWIP
sys/dev/pci/drm/amd/amdgpu/aldebaran_reg_init.c
44
adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));
sys/dev/pci/drm/amd/amdgpu/amdgpu_dev_coredump.c
41
[SDMA1_HWIP] = "SDMA1",
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
217
[SDMA1_HWIP] = SDMA1_HWID,
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2595
adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 0);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2624
adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 0, 1);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2701
adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 0);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2732
adev->ip_versions[SDMA1_HWIP][0] = IP_VERSION(4, 2, 2);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2733
adev->ip_versions[SDMA1_HWIP][1] = IP_VERSION(4, 2, 2);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2734
adev->ip_versions[SDMA1_HWIP][2] = IP_VERSION(4, 2, 2);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2735
adev->ip_versions[SDMA1_HWIP][3] = IP_VERSION(4, 2, 2);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2736
adev->ip_versions[SDMA1_HWIP][4] = IP_VERSION(4, 2, 2);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2737
adev->ip_versions[SDMA1_HWIP][5] = IP_VERSION(4, 2, 2);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2738
adev->ip_versions[SDMA1_HWIP][6] = IP_VERSION(4, 2, 2);
sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c
2803
adev->ip_versions[SDMA1_HWIP][1] = IP_VERSION(5, 0, 1);
sys/dev/pci/drm/amd/amdgpu/arct_reg_init.c
45
adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));
sys/dev/pci/drm/amd/amdgpu/cyan_skillfish_reg_init.c
50
adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
sys/dev/pci/drm/amd/amdgpu/dimgrey_cavefish_reg_init.c
47
adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));
sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c
448
return (adev->reg_offset[SDMA1_HWIP][0][0] + offset);
sys/dev/pci/drm/amd/amdgpu/vega10_reg_init.c
48
adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));
sys/dev/pci/drm/amd/amdgpu/vega20_reg_init.c
47
adev->reg_offset[SDMA1_HWIP][i] = (uint32_t *)(&(SDMA1_BASE.instance[i]));