sys/dev/pci/drm/amd/amdgpu/aldebaran_reg_init.c

43

adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/amdgpu_dev_coredump.c

40

[SDMA0_HWIP] = "SDMA0",

sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c

3916

(amdgpu_ip_version(adev, SDMA0_HWIP, 0) >=

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

216

[SDMA0_HWIP] = SDMA0_HWID,

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2329

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2378

amdgpu_ip_version(adev, SDMA0_HWIP, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2594

adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2623

adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 0, 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2654

adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2671

adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 1, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2700

adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2731

adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 2, 2);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2766

adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(4, 4, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2767

adev->ip_versions[SDMA0_HWIP][1] = IP_VERSION(4, 4, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2768

adev->ip_versions[SDMA0_HWIP][2] = IP_VERSION(4, 4, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2769

adev->ip_versions[SDMA0_HWIP][3] = IP_VERSION(4, 4, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2770

adev->ip_versions[SDMA0_HWIP][4] = IP_VERSION(4, 4, 0);

sys/dev/pci/drm/amd/amdgpu/amdgpu_discovery.c

2802

adev->ip_versions[SDMA0_HWIP][0] = IP_VERSION(5, 0, 1);

sys/dev/pci/drm/amd/amdgpu/amdgpu_fence.c

547

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) >=

sys/dev/pci/drm/amd/amdgpu/amdgpu_ip.c

35

case SDMA0_HWIP:

sys/dev/pci/drm/amd/amdgpu/amdgpu_ip.c

86

{ SDMA0_HWIP, adev->sdma.sdma_mask },

sys/dev/pci/drm/amd/amdgpu/amdgpu_kms.c

570

IP_VERSION_MAJ_MIN_REV(amdgpu_ip_version(adev, SDMA0_HWIP, 0));

sys/dev/pci/drm/amd/amdgpu/amdgpu_sdma.c

214

amdgpu_ucode_ip_version_decode(adev, SDMA0_HWIP, ucode_prefix, sizeof(ucode_prefix));

sys/dev/pci/drm/amd/amdgpu/amdgpu_sdma.c

258

if ((amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/amdgpu_sdma.c

260

amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/amdgpu_sdma.c

262

amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c

1270

} else if (block_type == SDMA0_HWIP) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c

1271

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/amdgpu_ucode.c

1432

case SDMA0_HWIP:

sys/dev/pci/drm/amd/amdgpu/arct_reg_init.c

44

adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/cyan_skillfish_reg_init.c

49

adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/dimgrey_cavefish_reg_init.c

46

adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(GC_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1026

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1304

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1741

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1764

if ((amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 0, 0)) &&

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1863

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1885

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) >=

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1887

amdgpu_ip_version(adev, SDMA0_HWIP, 0) <

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1900

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1943

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 2, 2) ||

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

1944

amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 0))

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2090

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2098

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) !=

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2320

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

2725

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

446

return (adev->reg_offset[SDMA0_HWIP][0][0] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

519

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

589

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

628

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

630

amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4.c

40

uint32_t sdma_base = adev->reg_offset[SDMA0_HWIP][0][0];

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1006

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) < IP_VERSION(4, 4, 5)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

121

return (adev->reg_offset[SDMA0_HWIP][dev_inst][0] + offset);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1335

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1541

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2) ||

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1542

amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 4) ||

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

1543

amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5))

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

198

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2) ||

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

199

amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 4) ||

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

200

amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

1831

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v5_0.c

238

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1702

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1768

amdgpu_ip_version(adev, SDMA0_HWIP, 0) ==

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1798

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

230

if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(5, 2, 1)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1262

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v6_0.c

1370

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/sdma_v7_0.c

1354

switch (amdgpu_ip_version(adev, SDMA0_HWIP, 0)) {

sys/dev/pci/drm/amd/amdgpu/vega10_reg_init.c

47

adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i]));

sys/dev/pci/drm/amd/amdgpu/vega20_reg_init.c

46

adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i]));

sys/dev/pci/drm/amd/amdkfd/kfd_device.c

69

uint32_t sdma_version = amdgpu_ip_version(kfd->adev, SDMA0_HWIP, 0);

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c

200

if (amdgpu_ip_version(dev->adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 2)) {

sys/dev/pci/drm/amd/amdkfd/kfd_int_process_v9.c

207

} else if (amdgpu_ip_version(dev->adev, SDMA0_HWIP, 0) == IP_VERSION(4, 4, 5)) {

sys/dev/pci/drm/amd/amdkfd/kfd_packet_manager_v9.c

223

return amdgpu_ip_version(dev->adev, SDMA0_HWIP, 0) >=