sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

85

sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

173

SOC15_REG_OFFSET(SDMA1, 0,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c

138

sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v12.c

89

sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0,

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

198

sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA1, 0,

sys/dev/pci/drm/amd/amdgpu/nv.c

343

{ SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},

sys/dev/pci/drm/amd/amdgpu/sdma_v2_4.c

282

ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c

458

ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1);

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

150

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

151

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_IB_CNTL, 0x800f0100, 0x00000100),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

152

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

153

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_IB_CNTL, 0x800f0100, 0x00000100),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

154

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

155

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_POWER_CNTL, 0x003ff000, 0x0003c000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

156

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_IB_CNTL, 0x800f0100, 0x00000100),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

157

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

158

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_IB_CNTL, 0x800f0100, 0x00000100),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

159

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

160

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_PAGE, 0x000003ff, 0x000003c0),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

161

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_WATERMK, 0xfc000000, 0x00000000)

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

168

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CHICKEN_BITS, 0xfe931f07, 0x02831d07),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

169

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG, 0x0018773f, 0x00104002),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

170

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG_READ, 0x0018773f, 0x00104002),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

171

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

178

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CHICKEN_BITS, 0xfe931f07, 0x02831d07),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

179

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG, 0x0018773f, 0x00104001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

180

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG_READ, 0x0018773f, 0x00104001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

181

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

234

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CHICKEN_BITS, 0xfe931f07, 0x02831f07),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

235

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

236

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG, 0x0000773f, 0x00004002),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

237

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG_READ, 0x0000773f, 0x00004002),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

238

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

239

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

240

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

241

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_PAGE_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

242

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RD_BURST_CNTL, 0x0000000f, 0x00000003),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

243

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

244

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff0, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

245

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

246

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

247

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC2_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

248

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC2_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

249

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC3_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

250

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC3_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

251

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC4_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

252

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC4_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

253

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC5_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

254

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC5_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

255

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC6_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

256

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC6_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

257

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC7_RB_RPTR_ADDR_LO, 0xfffffffd, 0x00000001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

258

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC7_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

259

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_PAGE, 0x000003ff, 0x000003c0),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

260

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

281

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CHICKEN_BITS, 0xfe931f07, 0x02831f07),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

282

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG, 0x0000773f, 0x00004002),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

283

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG_READ, 0x0000773f, 0x00004002),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

284

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

315

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG, 0x0018773f, 0x00104002),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

316

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GB_ADDR_CONFIG_READ, 0x0018773f, 0x00104002),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_0.c

317

SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_TIMEOUT, 0xffffffff, 0x00010001),

sys/dev/pci/drm/amd/amdgpu/soc15.c

389

{ SOC15_REG_ENTRY(SDMA1, 0, mmSDMA1_STATUS_REG)},

sys/dev/pci/drm/amd/amdgpu/soc21.c

264

{ SOC15_REG_ENTRY(SDMA1, 0, regSDMA1_STATUS_REG)},

sys/dev/pci/drm/amd/amdgpu/soc24.c

121

{ SOC15_REG_ENTRY(SDMA1, 0, regSDMA1_STATUS_REG)},

sys/dev/pci/drm/radeon/cik_sdma.c

179

ref_and_mask = SDMA1;