sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

138

m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

236

if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

255

temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c

272

SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

388

m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

507

if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

639

temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c

656

SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

374

m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

494

if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

563

temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c

580

SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

251

m->sdma_rlc_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

353

if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

472

temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

489

SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

274

m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

385

if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

507

temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

524

SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

399

m->sdmax_rlcx_rb_cntl & (~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK));

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

518

if (sdma_rlc_rb_cntl & SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK)

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

589

temp = temp & ~SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK;

sys/dev/pci/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

606

SDMA0_RLC0_RB_CNTL__RB_ENABLE_MASK);