SCL
BB_SET( SCL);
BB_SET(SDA | SCL);
BB_SET(SDA | SCL);
BB_SET(bit | SCL);
BB_SET(bit | SCL);
BB_SET(SDA | SCL);
while(((BB_READ & SCL) == 0) && bail < SCL_BAIL_COUNT) {
BB_SET(SDA | SCL);
BB_SET( SCL);
write_bit_to_ddc(ddc_handle, SCL, true);
write_bit_to_ddc(ddc_handle, SCL, false);
write_bit_to_ddc(ddc_handle, SCL, true);
write_bit_to_ddc(ddc_handle, SCL, false);
write_bit_to_ddc(ddc_handle, SCL, true);
write_bit_to_ddc(ddc_handle, SCL, false);
write_bit_to_ddc(ddc_handle, SCL, true);
write_bit_to_ddc(ddc_handle, SCL, false);
write_bit_to_ddc(ddc_handle, SCL, false);
write_bit_to_ddc(ddc_handle, SCL, true);
write_bit_to_ddc(ddc_handle, SCL, true);
write_bit_to_ddc(ddc_handle, SCL, true);
write_bit_to_ddc(ddc_handle, SCL, false);
if (read_bit_from_ddc(ddc, SCL))
SRI(SCL_TAP_CONTROL, SCL, id), \
SRI(SCL_CONTROL, SCL, id), \
SRI(SCL_BYPASS_CONTROL, SCL, id), \
SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \
SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \
SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \
SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \
SRI(SCL_COEF_RAM_SELECT, SCL, id), \
SRI(SCL_COEF_RAM_TAP_DATA, SCL, id), \
SRI(VIEWPORT_START, SCL, id), \
SRI(VIEWPORT_SIZE, SCL, id), \
SRI(SCL_SCALER_ENABLE, SCL, id), \
SRI(SCL_HORZ_FILTER_INIT_RGB_LUMA, SCL, id), \
SRI(SCL_HORZ_FILTER_INIT_CHROMA, SCL, id), \
SRI(SCL_HORZ_FILTER_SCALE_RATIO, SCL, id), \
SRI(SCL_VERT_FILTER_SCALE_RATIO, SCL, id), \
SRI(SCL_VERT_FILTER_INIT, SCL, id), \
SRI(SCL_AUTOMATIC_MODE_CONTROL, SCL, id), \
SRI(SCL_UPDATE, SCL, id), \
SRI(SCL_F_SHARP_CONTROL, SCL, id)
SRI(SCL_MODE, SCL, id), \
SRI(SCL_TAP_CONTROL, SCL, id), \
SRI(SCL_CONTROL, SCL, id), \
SRI(SCL_BYPASS_CONTROL, SCL, id), \
SRI(EXT_OVERSCAN_LEFT_RIGHT, SCL, id), \
SRI(EXT_OVERSCAN_TOP_BOTTOM, SCL, id), \
SRI(SCL_VERT_FILTER_CONTROL, SCL, id), \
SRI(SCL_HORZ_FILTER_CONTROL, SCL, id), \
SRI(SCL_COEF_RAM_SELECT, SCL, id), \
SRI(SCL_COEF_RAM_TAP_DATA, SCL, id), \
SRI(VIEWPORT_START, SCL, id), \
SRI(VIEWPORT_SIZE, SCL, id), \
SRI(SCL_HORZ_FILTER_SCALE_RATIO, SCL, id), \
SRI(SCL_VERT_FILTER_SCALE_RATIO, SCL, id), \
SRI(SCL_HORZ_FILTER_INIT, SCL, id), \
SRI(SCL_VERT_FILTER_INIT, SCL, id), \
SRI(SCL_AUTOMATIC_MODE_CONTROL, SCL, id), \
SRI(SCL_UPDATE, SCL, id), \
SRI(SCL_F_SHARP_CONTROL, SCL, id)
DDC_I2C_REG_LIST(SCL)\
DDC_REG_LIST_DCN2(SCL)\