R_VCS
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_BDW_PLUS, 0, 12, NULL},
F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},
F_LEN_VAR, R_VCS, D_BDW_PLUS, ADDR_FIX_3(1, 3, 5), 12, NULL},
{"OP_2_0_0_5", OP_2_0_0_5, F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 6, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, ADDR_FIX_1(2), 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
{"MFX_2_6_0_0", OP_MFX_2_6_0_0, F_LEN_VAR, R_VCS, D_ALL,
{"MFX_2_6_0_9", OP_MFX_2_6_0_9, F_LEN_VAR, R_VCS, D_ALL, 0, 16, NULL},
{"MFX_2_6_0_8", OP_MFX_2_6_0_8, F_LEN_VAR, R_VCS, D_ALL, 0, 16, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
R_VCS, D_ALL, 0, 12, NULL},
#define R_ALL (R_RCS | R_VCS | R_BCS | R_VECS)