RTW_WRITE
RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN);
RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN);
RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR);
RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
RTW_WRITE(&sc->sc_regs, RTW_FEMR,
RTW_WRITE(regs, tdb->tdb_basereg, tdb->tdb_base);
RTW_WRITE(regs, RTW_RDSAR, RTW_RING_BASE(sc, hd_rx));
RTW_WRITE(&sc->sc_regs, RTW_TINT, next_tick);
RTW_WRITE(regs, RTW_ANAPARM_0, anaparm);
RTW_WRITE(regs, RTW_ANAPARM_0, anaparm);
RTW_WRITE(regs, RTW_ANAPARM_0, anaparm);
RTW_WRITE(regs, RTW_TCR, tcr);
RTW_WRITE(regs, RTW_MAR0, hashes[0]);
RTW_WRITE(regs, RTW_MAR1, hashes[1]);
RTW_WRITE(regs, RTW_RCR, sc->sc_rcr);
RTW_WRITE(regs, RTW_FEMR, 0xffff);
RTW_WRITE(regs, RTW_BSSID32, 0x0);
RTW_WRITE(regs, RTW_TCR, tcr);
RTW_WRITE(regs, RTW_RCR, REVAB);
RTW_WRITE(regs, RTW_RCR, REVC);
RTW_WRITE(regs, RTW_RCR, rcr0); /* restore RCR */
RTW_WRITE(regs, RTW_ANAPARM_0, anaparm);
RTW_WRITE(regs, RTW_TCR, tcr);
RTW_WRITE(regs, RTW_BB, wrbbp);
RTW_WRITE(regs, RTW_BB, rdbbp);
RTW_WRITE(regs, RTW8180_PHYCFG, reg);
RTW_WRITE(regs, RTW8180_PHYCFG, reg);
RTW_WRITE(regs, RTW8180_PHYCFG, reg);
RTW_WRITE(regs, RTW8180_PHYCFG, reg);
RTW_WRITE(regs, RTW8180_PHYCFG, reg);
RTW_WRITE(regs, RTW8180_PHYCFG, reg);
RTW_WRITE(regs, RTW8180_PHYCFG, RTW8180_PHYCFG_MAC_POLL | reg);
RTW_WRITE((regs), (reg), RTW_READ((regs), (reg)) & ~(mask))