sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8504

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8509

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8514

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8523

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8528

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

8533

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5308

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5313

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5322

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5327

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmCP_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

5333

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2796

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_CGTT_MGCG_OVERRIDE));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2801

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_CGCG_CGLS_CTRL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2810

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regRLC_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

2815

data = RREG32_KIQ(SOC15_REG_OFFSET(GC, GET_INST(GC, 0), regCP_MEM_SLP_CNTL));

sys/dev/pci/drm/amd/amdgpu/sdma_v5_2.c

1839

data = RREG32_KIQ(sdma_v5_2_get_reg_offset(adev, 0, mmSDMA0_POWER_CNTL));

sys/dev/pci/drm/amd/pm/swsmu/smu11/vangogh_ppt.c

2252

tmp = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_ALWAYS_ON_WGP_MASK));