Symbol: RREG32_SOC15_OFFSET
sys/dev/pci/drm/amd/amdgpu/gfxhub_v11_5_0.c
300
tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v12_0.c
305
tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_0.c
265
tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v1_2.c
346
tmp = RREG32_SOC15_OFFSET(GC, GET_INST(GC, j), regVM_CONTEXT1_CNTL,
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_0.c
290
tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c
302
tmp = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c
572
adev->gmc.VM_CONTEXT_CNTL[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, i);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c
573
adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, i * 2);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c
574
adev->gmc.VM_CONTEXT_PAGE_TABLE_BASE_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, i * 2);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c
575
adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, i * 2);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c
576
adev->gmc.VM_CONTEXT_PAGE_TABLE_START_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, i * 2);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c
577
adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_LO32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, i * 2);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v2_1.c
578
adev->gmc.VM_CONTEXT_PAGE_TABLE_END_ADDR_HI32[i] = RREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, i * 2);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0.c
297
tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/gfxhub_v3_0_3.c
302
tmp = RREG32_SOC15_OFFSET(GC, 0, regGCVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c
608
ring->wptr = RREG32_SOC15_OFFSET(JPEG, jpeg_inst, regUVD_JRBC0_UVD_JRBC_RB_WPTR,
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c
680
return RREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, ring->me), regUVD_JRBC0_UVD_JRBC_RB_RPTR,
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c
698
return RREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, ring->me), regUVD_JRBC0_UVD_JRBC_RB_WPTR,
sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c
978
ret &= ((RREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, i),
sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c
445
ring->wptr = RREG32_SOC15_OFFSET(JPEG, jpeg_inst, regUVD_JRBC_RB_WPTR,
sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c
613
return RREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, ring->me), regUVD_JRBC_RB_RPTR,
sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c
631
return RREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, ring->me), regUVD_JRBC_RB_WPTR,
sys/dev/pci/drm/amd/amdgpu/jpeg_v5_0_1.c
667
ret &= ((RREG32_SOC15_OFFSET(JPEG, GET_INST(JPEG, i),
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_0.c
293
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_7.c
184
tmp = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_7.c
190
tmp = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_7.c
301
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c
250
tmp = RREG32_SOC15_OFFSET(MMHUB, i,
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c
256
tmp = RREG32_SOC15_OFFSET(MMHUB, i,
sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c
395
tmp = RREG32_SOC15_OFFSET(MMHUB, j, regVM_CONTEXT1_CNTL,
sys/dev/pci/drm/amd/amdgpu/mmhub_v2_0.c
373
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/mmhub_v2_3.c
289
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0.c
327
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_1.c
321
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/mmhub_v3_0_2.c
319
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/mmhub_v3_3.c
414
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i * hub->ctx_distance);
sys/dev/pci/drm/amd/amdgpu/mmhub_v4_1_0.c
320
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, regMMVM_CONTEXT1_CNTL, i);
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
163
tmp = RREG32_SOC15_OFFSET(
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
180
tmp = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
212
tmp = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
220
tmp = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
236
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
254
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL2,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
290
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT0_CNTL,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
340
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
451
tmp = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
464
tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVML2PF0_VM_L2_CNTL,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
487
tmp = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
598
def = data = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
612
def1 = data1 = RREG32_SOC15_OFFSET(MMHUB, 0,
sys/dev/pci/drm/amd/amdgpu/mmhub_v9_4.c
654
def = data = RREG32_SOC15_OFFSET(MMHUB, 0,