sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7697

clock_hi = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Cyan_Skillfish);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7698

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Cyan_Skillfish);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7699

hi_check = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Cyan_Skillfish);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7704

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Cyan_Skillfish);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7714

clock_hi = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Vangogh);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7715

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Vangogh);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7716

hi_check = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Vangogh);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7721

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Vangogh);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7729

clock_hi = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_GC_10_3_6);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7730

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_GC_10_3_6);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7731

hi_check = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_GC_10_3_6);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7736

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_GC_10_3_6);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7744

clock_hi = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7745

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7746

hi_check = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER);

sys/dev/pci/drm/amd/amdgpu/gfx_v10_0.c

7751

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4276

clock_hi = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Renoir);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4277

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Renoir);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4278

hi_check = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_UPPER_Renoir);

sys/dev/pci/drm/amd/amdgpu/gfx_v9_0.c

4283

clock_lo = RREG32_SOC15_NO_KIQ(SMUIO, 0, mmGOLDEN_TSC_COUNT_LOWER_Renoir);

sys/dev/pci/drm/amd/amdgpu/hdp_v4_0.c

49

RREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE);

sys/dev/pci/drm/amd/amdgpu/hdp_v5_0.c

35

RREG32_SOC15_NO_KIQ(HDP, 0, mmHDP_READ_CACHE_INVALIDATE);