Symbol: RK3308_CRU_CLKSEL_CON
sys/dev/fdt/rkclock.c
1059
RK3308_CLK_RTC32K, RK3308_CRU_CLKSEL_CON(2),
sys/dev/fdt/rkclock.c
1064
RK3308_CLK_UART0, RK3308_CRU_CLKSEL_CON(10),
sys/dev/fdt/rkclock.c
1070
RK3308_CLK_UART1, RK3308_CRU_CLKSEL_CON(13),
sys/dev/fdt/rkclock.c
1076
RK3308_CLK_UART2, RK3308_CRU_CLKSEL_CON(16),
sys/dev/fdt/rkclock.c
1082
RK3308_CLK_UART3, RK3308_CRU_CLKSEL_CON(19),
sys/dev/fdt/rkclock.c
1088
RK3308_CLK_UART4, RK3308_CRU_CLKSEL_CON(22),
sys/dev/fdt/rkclock.c
1094
RK3308_CLK_PWM0, RK3308_CRU_CLKSEL_CON(29),
sys/dev/fdt/rkclock.c
1099
RK3308_CLK_SPI0, RK3308_CRU_CLKSEL_CON(30),
sys/dev/fdt/rkclock.c
1104
RK3308_CLK_SPI1, RK3308_CRU_CLKSEL_CON(31),
sys/dev/fdt/rkclock.c
1109
RK3308_CLK_SPI2, RK3308_CRU_CLKSEL_CON(32),
sys/dev/fdt/rkclock.c
1114
RK3308_CLK_TSADC, RK3308_CRU_CLKSEL_CON(33),
sys/dev/fdt/rkclock.c
1119
RK3308_CLK_SARADC, RK3308_CRU_CLKSEL_CON(34),
sys/dev/fdt/rkclock.c
1124
RK3308_CLK_CRYPTO, RK3308_CRU_CLKSEL_CON(7),
sys/dev/fdt/rkclock.c
1129
RK3308_CLK_CRYPTO_APK, RK3308_CRU_CLKSEL_CON(7),
sys/dev/fdt/rkclock.c
1134
RK3308_CLK_SDMMC, RK3308_CRU_CLKSEL_CON(39),
sys/dev/fdt/rkclock.c
1140
RK3308_CLK_SDIO, RK3308_CRU_CLKSEL_CON(40),
sys/dev/fdt/rkclock.c
1146
RK3308_CLK_EMMC, RK3308_CRU_CLKSEL_CON(41),
sys/dev/fdt/rkclock.c
1152
RK3308_CLK_MAC_SRC, RK3308_CRU_CLKSEL_CON(43),
sys/dev/fdt/rkclock.c
1157
RK3308_CLK_MAC, RK3308_CRU_CLKSEL_CON(43),
sys/dev/fdt/rkclock.c
1163
RK3308_ACLK_PERI_SRC, RK3308_CRU_CLKSEL_CON(36),
sys/dev/fdt/rkclock.c
1168
RK3308_PCLK_PERI, RK3308_CRU_CLKSEL_CON(37),
sys/dev/fdt/rkclock.c
1218
reg = HREAD4(sc, RK3308_CRU_CLKSEL_CON(0));
sys/dev/fdt/rkclock.c
1239
reg = HREAD4(sc, RK3308_CRU_CLKSEL_CON(0));
sys/dev/fdt/rkclock.c
1253
HWRITE4(sc, RK3308_CRU_CLKSEL_CON(0),
sys/dev/fdt/rkclock.c
1268
HWRITE4(sc, RK3308_CRU_CLKSEL_CON(0),
sys/dev/fdt/rkclock.c
1453
reg = HREAD4(sc, RK3308_CRU_CLKSEL_CON(2));
sys/dev/fdt/rkclock.c
1465
div_con = HREAD4(sc, RK3308_CRU_CLKSEL_CON(4)) & 0xffff;
sys/dev/fdt/rkclock.c
1488
HWRITE4(sc, RK3308_CRU_CLKSEL_CON(2), 1 << 26 | (mux << 10));
sys/dev/fdt/rkclock.c
1489
HWRITE4(sc, RK3308_CRU_CLKSEL_CON(4), 0xffff0000 | div_con);