RLC_PG_CNTL
WREG32_FIELD(RLC_PG_CNTL, GFX_POWER_GATING_ENABLE, 1);
WREG32_FIELD(RLC_PG_CNTL, GFX_POWER_GATING_SRC, 1);
WREG32_FIELD(RLC_PG_CNTL, SMU_CLK_SLOWDOWN_ON_PU_ENABLE, enable ? 1 : 0);
WREG32_FIELD(RLC_PG_CNTL, SMU_CLK_SLOWDOWN_ON_PD_ENABLE, enable ? 1 : 0);
WREG32_FIELD(RLC_PG_CNTL, CP_PG_DISABLE, enable ? 0 : 1);
WREG32_FIELD(RLC_PG_CNTL, STATIC_PER_CU_PG_ENABLE, enable ? 1 : 0);
WREG32_FIELD(RLC_PG_CNTL, DYN_PER_CU_PG_ENABLE, enable ? 1 : 0);
WREG32_FIELD(RLC_PG_CNTL, QUICK_PG_ENABLE, enable ? 1 : 0);
WREG32_FIELD(RLC_PG_CNTL, GFX_POWER_GATING_ENABLE, enable ? 1 : 0);
WREG32_FIELD(RLC_PG_CNTL, GFX_PIPELINE_PG_ENABLE, enable ? 1 : 0);
data = REG_SET_FIELD(data, RLC_PG_CNTL,
data = REG_SET_FIELD(data, RLC_PG_CNTL,
data = REG_SET_FIELD(data, RLC_PG_CNTL,
data = REG_SET_FIELD(data, RLC_PG_CNTL,
data = REG_SET_FIELD(data, RLC_PG_CNTL,
data = REG_SET_FIELD(data, RLC_PG_CNTL,
data = REG_SET_FIELD(data, RLC_PG_CNTL,
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
orig = data = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, data);
tmp = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, tmp);
tmp = RREG32(RLC_PG_CNTL);
WREG32(RLC_PG_CNTL, tmp);