RK3328_HDMIPHY
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_HDMIPHY, RK3328_DCLK_LCDC_SRC }
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY }
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY }
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
{ RK3328_PLL_CPLL, RK3328_PLL_GPLL, RK3328_HDMIPHY,
case RK3328_HDMIPHY:
idx = (mux == 0) ? RK3328_HDMIPHY : RK3328_DCLK_LCDC_SRC;