Symbol: RK3308_CRU_CLKSEL_CON
sys/dev/fdt/rkclock.c
1056
RK3308_CLK_RTC32K, RK3308_CRU_CLKSEL_CON(2),
sys/dev/fdt/rkclock.c
1061
RK3308_CLK_UART0, RK3308_CRU_CLKSEL_CON(10),
sys/dev/fdt/rkclock.c
1067
RK3308_CLK_UART1, RK3308_CRU_CLKSEL_CON(13),
sys/dev/fdt/rkclock.c
1073
RK3308_CLK_UART2, RK3308_CRU_CLKSEL_CON(16),
sys/dev/fdt/rkclock.c
1079
RK3308_CLK_UART3, RK3308_CRU_CLKSEL_CON(19),
sys/dev/fdt/rkclock.c
1085
RK3308_CLK_UART4, RK3308_CRU_CLKSEL_CON(22),
sys/dev/fdt/rkclock.c
1091
RK3308_CLK_PWM0, RK3308_CRU_CLKSEL_CON(29),
sys/dev/fdt/rkclock.c
1096
RK3308_CLK_SPI0, RK3308_CRU_CLKSEL_CON(30),
sys/dev/fdt/rkclock.c
1101
RK3308_CLK_SPI1, RK3308_CRU_CLKSEL_CON(31),
sys/dev/fdt/rkclock.c
1106
RK3308_CLK_SPI2, RK3308_CRU_CLKSEL_CON(32),
sys/dev/fdt/rkclock.c
1111
RK3308_CLK_TSADC, RK3308_CRU_CLKSEL_CON(33),
sys/dev/fdt/rkclock.c
1116
RK3308_CLK_SARADC, RK3308_CRU_CLKSEL_CON(34),
sys/dev/fdt/rkclock.c
1121
RK3308_CLK_CRYPTO, RK3308_CRU_CLKSEL_CON(7),
sys/dev/fdt/rkclock.c
1126
RK3308_CLK_CRYPTO_APK, RK3308_CRU_CLKSEL_CON(7),
sys/dev/fdt/rkclock.c
1131
RK3308_CLK_SDMMC, RK3308_CRU_CLKSEL_CON(39),
sys/dev/fdt/rkclock.c
1137
RK3308_CLK_SDIO, RK3308_CRU_CLKSEL_CON(40),
sys/dev/fdt/rkclock.c
1143
RK3308_CLK_EMMC, RK3308_CRU_CLKSEL_CON(41),
sys/dev/fdt/rkclock.c
1149
RK3308_CLK_MAC_SRC, RK3308_CRU_CLKSEL_CON(43),
sys/dev/fdt/rkclock.c
1154
RK3308_CLK_MAC, RK3308_CRU_CLKSEL_CON(43),
sys/dev/fdt/rkclock.c
1160
RK3308_ACLK_PERI_SRC, RK3308_CRU_CLKSEL_CON(36),
sys/dev/fdt/rkclock.c
1165
RK3308_PCLK_PERI, RK3308_CRU_CLKSEL_CON(37),
sys/dev/fdt/rkclock.c
1215
reg = HREAD4(sc, RK3308_CRU_CLKSEL_CON(0));
sys/dev/fdt/rkclock.c
1236
reg = HREAD4(sc, RK3308_CRU_CLKSEL_CON(0));
sys/dev/fdt/rkclock.c
1250
HWRITE4(sc, RK3308_CRU_CLKSEL_CON(0),
sys/dev/fdt/rkclock.c
1265
HWRITE4(sc, RK3308_CRU_CLKSEL_CON(0),
sys/dev/fdt/rkclock.c
1450
reg = HREAD4(sc, RK3308_CRU_CLKSEL_CON(2));
sys/dev/fdt/rkclock.c
1462
div_con = HREAD4(sc, RK3308_CRU_CLKSEL_CON(4)) & 0xffff;
sys/dev/fdt/rkclock.c
1485
HWRITE4(sc, RK3308_CRU_CLKSEL_CON(2), 1 << 26 | (mux << 10));
sys/dev/fdt/rkclock.c
1486
HWRITE4(sc, RK3308_CRU_CLKSEL_CON(4), 0xffff0000 | div_con);