sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1682

ENGINE_READ_FW(engine, RING_TAIL) & TAIL_ADDR);

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1690

(ENGINE_READ_FW(engine, RING_TAIL) & TAIL_ADDR))

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

1857

(ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR))

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

2104

ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR);

sys/dev/pci/drm/i915/gt/intel_execlists_submission.c

1976

ENGINE_READ(engine, RING_TAIL) & TAIL_ADDR,

sys/dev/pci/drm/i915/gt/intel_gt.c

148

intel_uncore_write(uncore, RING_TAIL(base), 0);

sys/dev/pci/drm/i915/gt/intel_gt.c

441

RING_TAIL(RENDER_RING_BASE));

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

180

ENGINE_WRITE_FW(engine, RING_HEAD, ENGINE_READ_FW(engine, RING_TAIL));

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

189

ENGINE_WRITE_FW(engine, RING_TAIL, 0);

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

254

ENGINE_WRITE_FW(engine, RING_TAIL, ring->head);

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

255

if (ENGINE_READ_FW(engine, RING_HEAD) != ENGINE_READ_FW(engine, RING_TAIL)) {

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

258

ENGINE_READ_FW(engine, RING_TAIL),

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

283

ENGINE_WRITE_FW(engine, RING_TAIL, ring->tail);

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

284

ENGINE_POSTING_READ(engine, RING_TAIL);

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

298

ENGINE_READ(engine, RING_TAIL), ring->tail,

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

367

ENGINE_READ_FW(engine, RING_TAIL),

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

382

ENGINE_READ_FW(engine, RING_TAIL),

sys/dev/pci/drm/i915/gt/intel_ring_submission.c

481

ENGINE_WRITE(request->engine, RING_TAIL,

sys/dev/pci/drm/i915/gt/selftest_lrc.c

320

i915_mmio_reg_offset(RING_TAIL(engine->mmio_base)),

sys/dev/pci/drm/i915/gt/selftest_lrc.c

452

*cs++ = i915_mmio_reg_offset(RING_TAIL(engine->mmio_base));

sys/dev/pci/drm/i915/gt/uc/intel_guc_capture.c

69

{ RING_TAIL(0), 0, 0, "TAIL" }, \

sys/dev/pci/drm/i915/gvt/handlers.c

2242

MMIO_RING_DFH(RING_TAIL, D_ALL, 0, NULL, NULL);

sys/dev/pci/drm/i915/gvt/scheduler.c

972

vgpu_vreg_t(vgpu, RING_TAIL(ring_base)) = tail;

sys/dev/pci/drm/i915/i915_gpu_error.c

1404

ee->tail = ENGINE_READ(engine, RING_TAIL);

sys/dev/pci/drm/i915/i915_pmu.c

396

tail = ENGINE_READ_FW(engine, RING_TAIL);

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

92

MMIO_RING_D(RING_TAIL);