Symbol: RING_PP_DIR_DCLV
sys/dev/pci/drm/i915/gt/intel_engine_cs.c
2221
ENGINE_READ(engine, RING_PP_DIR_DCLV));
sys/dev/pci/drm/i915/gt/intel_ring_submission.c
167
ENGINE_WRITE_FW(engine, RING_PP_DIR_DCLV, PP_DIR_DCLV_2G);
sys/dev/pci/drm/i915/gt/intel_ring_submission.c
709
*cs++ = i915_mmio_reg_offset(RING_PP_DIR_DCLV(engine->mmio_base));